Silicon Laboratories Inc.

Praveen Kallam

Nicholas Montgomery Atkinson

Axel Thomsen

Kenneth Wilson Fernald

Dazhi Wei

Mohamed M Elsayed

Scott Willingham

Timothy Thomas Rueger

Pavel Konecny

Johnny Gudmund Bjornsen

Dennis Sinitsky

Matthew Powell

Jinwen Xiao

Chao Yang

Shouli Yan

Steffen Skaug

Gang Yuan

Imranul Islam

Erik Pankratz

An apparatus includes a circuit that has a normal mode of operation and a low-power mode of operation. The circuit consumes more power in the normal mode of operation than in the low-power mode of operation. The apparatus further includes a power-supply circuit. The power-supply circuit provides a normal supply voltage to the circuit in the normal mode of operation. The power-supply circuit includes a non-linear circuit to provide a compressed supply voltage to the circuit in the low-power mode of operation, wherein the normal supply voltage is greater than the compressed supply voltage.

Apparatus for power consumption reduction in electronic circuitry and associated methods

Circuitry and methods are provided that may be implemented to transfer digital signals between multiple voltage domains while some of these domains may be invalid, e.g., such as to transfer a digital signal from a source voltage domain to a destination voltage domain while the voltage of the source domain is zero or invalid. Possible implementations include, but are not limited to, for power selection and distribution in an integrated circuit chip that has multiple power sources (e.g., such as main power supply and a backup power supply), and in which at startup the chip is agnostic of (or is not aware of) which power supply or power supplies is actually powered and available.

Digital signal transfer between multiple voltage domains

An apparatus includes a digital battery charger. The digital battery charger includes an analog-to-digital converter (ADC) to convert a terminal voltage of a battery to a first digital signal. The digital battery charger further includes a digital controller coupled to the ADC to receive the first digital signal and provide a set of control signals. The digital battery charger further includes a current digital-to-analog converter (IDAC) coupled to the digital controller to receive the set of control signals and to provide a battery charging current signal.

Apparatus for digital battery charger and associated methods

An apparatus includes a voltage regulator to regulate a voltage from a power source and to provide an output current at an output. The apparatus further includes a battery charger, coupled to the voltage regulator, to provide a charge current. The apparatus further includes a controller to control the charge current such that the charge current is less than or equal to a current available from the power source minus the output current.

Apparatus for battery charger with controlled charge current and associated methods

An apparatus includes an integrated circuit (IC). The IC includes a regulator to receive a plurality of input voltages and to provide a regulated output voltage to a load. The regulator includes a plurality of voltage regulators that receive the plurality of input voltages and provide the regulated output voltage as an output of the regulator. The IC further includes a controller that controls the regulator by using a voltage regulator in the plurality of voltage regulators to generate the regulated output voltage from the plurality of input voltages.

Apparatus for power regulator with multiple inputs and associated methods

In one embodiment, an apparatus includes a controller to control a voltage regulator. The controller may have a first comparator circuit to compare a first reference voltage to a feedback voltage. In turn, the first comparator circuit may include: a first comparator having a first input terminal to receive the feedback voltage and a second input terminal to receive the reference voltage and an output node to output an error signal based on the comparison; and a first pre-charge circuit coupled between the first input terminal and the output node configured to pre-charge a first portion of a compensation network to a pre-charge level. The first controller may further include a second comparator circuit coupled to the first comparator circuit compare the error signal to a ramp signal and to generate a first control output to control a power train of the voltage regulator in a first mode of operation.

Pre-charge technique for a voltage regulator

In one embodiment, a voltage comparator circuit includes a first comparator circuit to compare a first voltage and a second voltage and a second comparator circuit to compare the first voltage and the second voltage. The voltage comparator circuit may include charge storage circuitry and positive feedback circuitry. Such circuitry may boost current within the first and second comparator circuits to enable the voltage comparator circuit to output a comparison decision within a delay threshold in response to input transitions within a slew rate threshold.

High speed low current voltage comparator

An apparatus includes an integrated circuit (IC). The IC includes a power controller, which includes a regulator and a controller. The regulator receives a plurality of input voltages and provides a regulated output voltage. The controller controls the regulator to generate the regulated output voltage from the plurality of input voltages. The power controller provides power to a load integrated in the IC from a set of arbitrary input voltages. The set of arbitrary input voltages includes the plurality of input voltages.

Apparatus for multiple-input power architecture for electronic circuitry and associated methods

In some embodiments, a method may include receiving an input signal at an input stage of a circuit and amplifying the input signal using an amplifier of the circuit to produce a level-shifted output signal. The method may further include selectively controlling switches of an active load coupled to the input stage based on the level-shifted output signal to turn off current flow between transitions in the input signal.

Level-shifter circuit for low-input voltages

A method includes using a pass device of a linear regulator to provide an output signal to an output of the linear regulator in response to a signal that is received at a control terminal of the pass device. The method includes using the linear regulator to regulate the signal received at the control terminal based at least in part on the output signal; and controlling a closed loop frequency response of the linear regulator to cause a direct current (DC) gain of the linear regulator to extend to a frequency near or at frequency of a zero that is associated with a decoupling capacitor that is coupled to the output of the linear regulator.

Linear regulator having a closed loop frequency response based on a decoupling capacitance

A phase detector includes a phase propagator circuit including a plurality of flip-flops. Each flip-flop includes a clock input configured to receive a clock signal having a different phase relative to phases of the clock signal received by other flip-flops in the plurality of flip-flops. The phase detector further includes a phase controller coupled to the clock input of each flip-flop in the plurality of flip-flops. The phase controller is configured to provide the different phases of the clock signal to the plurality of flip-flops such that the different phases are scaled exponentially relative to one another.

Multi-stage delay-locked loop phase detector

A relaxation oscillator circuit includes a comparator including a first input, a second input, a bias input, and an output. The first input is coupled to a charging node, and the second input is configured to receive a reference voltage. The relaxation oscillator circuit further includes a first bias circuit configured to provide a bias signal to the bias input of the first comparator when a first node voltage on the charging node exceeds a first reference.

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Austin, TX, United States of America

Praveen Kallam