Western Digital Technologies, Inc.

Sandisk Technologies Inc.

Prashant Singhal

Ramakrishnan Subramanian

Jayaprakash Naradasi

Anand Venkitachalam

Vallivelraja Ponnudurai

Anil Jain

Technology is disclosed herein for aborting a tail portion of a command queue in a storage device. In one aspect, one or more control circuits of a storage system are configured to abort tasks at a tail end of a command queue in response to receiving a task tail abort command. However, tasks at the head end of the command queue may still be executed. Thus, the head end of the command queue need not be rebuilt after the task tail abort command is performed. Therefore, considerable time is saved by not having to rebuild the head end of the command queue. Note that the task tail abort command may be received while the storage system is in a sequential command execution mode, in which tasks are executed in the order of their respective task identifiers.

Task tail abort for queued storage tasks

Methods and circuits for delay compensation are provided. A data clock may be generated from a peripheral clock. Sample data may be provided in a data signal on a bus in response to an edge of the data clock, where the edge of the data clock is triggered by an initial edge of the peripheral clock. A delay of the data clock relative to the peripheral clock may be selected based on a time difference between the initial edge of the peripheral clock and a time at which the sample data is detected on the bus. A delayed data clock having the selected delay relative to the peripheral clock may be generated. Requested data may be provided on the bus in response to an edge of the delayed data clock.

Delay compensation

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Bengaluru, India

Prashant Singhal