Intel Corporation

Prashant Sethi

Scott Dion Rodgers

David J Harriman

Ajay V Bhatt

Hong Wang

Jasmin Ajanovic

Gautham N Chinya

Sridhar Muthrasanallur

Debendra Das Sharma

Robert G Blankenship

Baiju V Patel

Mahesh U Wagh

Mark B Rosenbluth

Anil Vasudevan

Ilan Pardo

James E Akiyama

Eran Tamari

Doron Shamia

Peter J Barry

Eliezer Weissmann

Ohad Falik

Bryant E Bigbee

Richard A Hankins

Shivnandan D Kaushik

Xiang Chris Zou

John Thomas Shen

James Paul Held

Per H Hammarlund

Anil Aggarwal

Clifford D Hall

Abraham Mendelson

John L Reid

Jason W Brandt

Brent S Baxter

William H Clifford

Xinmin Tian

John P Shen

Trung Am Diep

Avi Mendelson

Reuven Rozic

Robert E Gough

Randolph L Campbell

Tin-Cheung Kung

Shanthanand Kutuva Rabindranath

Martin Guy Dixon

Stephen H Gunther

Asit K Mallick

Jose Andy Vargas

Chia-Hung Sophia Kuo

Nivedita Aggarwal

Sanjiv M Shah

Ryan N Rakvic

Maxim Dan

Taraneh Bahrami

Avi (Abraham) Mendelson

Rajesh M Sankaran

Edward Thomas Grochowski

Milind Baburao Girkar

Krishnan Rajamani

Joseph A Bennett

Jamison D Collins

Paul M Petersen

Ethan Schuchman

Vijaykumar Balaram Kadgi

Deepak A Mathaikutty

Ed Grochowski

Carl L First

Stephen F Whalley

Joseph M Dragony

Arie Chobotaro

Anil Aggawal

Mohan J Kumar

Murali Ramadoss

Barry E Huntley

Nitin V Sarangdhar

Michael T Klinglesmith

Karunakara Kotary

Douglas M Carmean

Rupin H Vakharwala

Karthi R Vadivelu

Abdul Rahman Ismail

Venkatesh Ramamurthy

Peter S Adamson

David B Minturn

Michael W Chynoweth

Tawfik M Rahal-Arabi

Toby Opferman

Joseph Frank Cihula

Roman Surgutchik

Joseph A Schaefer

Gaurav Khanna

James Charles Abel

David K Poulsen

Vinay Raghav

Shiv Kaushik

David Hines

Anthony M Constantine

Chang-Wu Yen

David Woodhouse

Steve Pawlowski

A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.

Flattening portal bridge

Automatic-switching and deployment of software (SW)- or firmware (FW)-based USB4 connection managers (CMs) and associated methods, apparatus, software and firmware. A handshake is defined between BIOS and an operating system (OS) to discover supported CM capability and dynamically switch from a FW CM to a SW CM and visa verse if there is a mismatch. In addition, a mechanism is defined to deploy the correct FW or SW CM driver based on class code, 2-part or 4-part ID. Support for continued USB4 operation during an OS upgrade or downgrade is provided, while ensuring that the best possible CM solution is used based on the advertised platform and OS capability. USB4 controllers support a pass-through mode under which the host controller FW redirects control packets sent between an SW CM and a USB4 fabric, and a FW CM mode under which control packets are communicated between the host controller FW and the USB4 fabric to configure USB4 peripheral devices and/or USB4 hubs in the USB4 fabric.

Automatic switching and deployment of software or firmware based USB4 connection managers

Systems, methods, and apparatuses relating to an instruction for operating system transparent instruction state management of new instructions for application threads are described. In one embodiment, a hardware processor includes a decoder to decode a single instruction into a decoded single instruction, and an execution circuit to execute the decoded single instruction to cause a context switch from a current state to a state comprising additional state data that is not supported by an execution environment of an operating system that executes on the hardware processor.

Apparatuses, methods, and systems for instructions for operating system transparent instruction state management of new instructions for application threads

A method is described. The method includes determining that a first of a plurality of processor cores in a multi-processor computing system has entered an idle state, triggering a SMI for the first processor core, the first processor core entering a system management mode (SMM) and performing one or more platform management operations.

Enhanced directed system management interrupt mechanism

Bridge logic is provided to receive a request from a device, where the request references an address of a secondary address space. The secondary address space corresponds to a subset of addresses in a configuration address space of a system, and the secondary address space corresponds to a first view of the configuration address space. The bridge logic uses a mapping table to translate the address into a corresponding address in the configuration address space, where addresses of the configuration address space correspond to a different second view of the configuration address space.

Bus-device-function address space mapping

A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.

System and methods exchanging data between processors through concurrent shared memory

Particular embodiments described herein provide for an electronic device that can receive data from an operating system in an electronic device, where the data is related to hardware that is in communication with the electronic device through a multimodal interface and communicate the data and/or related data to a local policy manager, where the local policy manager is in communication with the multimodal interface. The multimodal interface can be configured to support power transfers, directionality, and multiple input/output (I/O) protocols on the same interface.

Multimodal interface

Examples include techniques for dynamically modifying a platform form factor of a mobile device. In some examples, a system may include a split memory array having a first memory within a docking system and a second memory element within a small form factor (SFF) mobile device. A platform form factor determination component may dynamically select between multiple platform form factors based on a determination that the SFF mobile device is coupled with the docking system. An interface logic component may access the first memory storage of the docking system during a memory (e.g., graphics) computation when the mobile device is physically and electrically/communicably coupled with the docking system to allow the SFF mobile device to have full LFF functionality. When the SFF mobile device is disconnected from the docking system, the interface logic component may access only the second memory storage of the SFF mobile device to provide SFF functionality.

Techniques for dynamically modifying platform form factors of a mobile device

Various techniques for enabling the control and monitoring of a USB device mode controller to a USB-C connector, for the performance of a USB device mode data connection, are disclosed herein. In an example, a computing system that includes multiple USB-C connectors but a single USB device mode controller may manage the availability of the controller to a particular connector. The computing system may determine availability of a USB device mode controller to control the first USB-C connector, wherein the attempted data connection occurs with the first USB-C connector configured as an upstream facing port. The computing system may further perform, in response, a data role swap of the first USB-C connector to configure the first USB-C connector as a downstream facing port. The computing system may, further continue the attempted data connection with the remote computing system via the first USB-C connector configured as a downstream facing port.

USB-C multiple connector support for host and device mode configurations

Embodiments of an invention for address translation for scalable I/O device virtualization are disclosed. In one embodiment, an apparatus includes PASID table lookup circuitry. The PASID table lookup circuitry is to find a PASID-entry in a PASID table. The PASID-entry is to include a PASID processing mode (PPM) indicator and a first pointer to a first translation structure. The PPM indicator is to specify one of a plurality of translation types, the one of the plurality of translation types to use the first translation structure.

Address translation for scalable virtualization of input/output devices

In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

Mechanism for instruction set based thread execution on a plurality of instruction sequencers

One embodiment provides an apparatus. The apparatus includes an input output memory management unit (I/O MMU), a non-secure operating system (OS) driver, a secure OS driver and a virtual machine monitor (VMM). The I/OMMU is to couple an I/O Controller to a memory. The I/O Controller is coupled to a secure device and a non-secure device and has one I/O Controller identifier. The non-secure OS driver is associated with the non-secure device. The secure OS driver is associated with the secure device. The VMM is to allocate a secure address space to a secure OS and a non-secure address space to a non-secure OS. The secure address space is non-overlapping with the non-secure address space.

System and method for coupling a host device to secure and non-secure devices

Growing community of inventors

Folsom, CA, United States of America

Prashant Sethi