Honeywell International Inc.

Honeywell G.m.b.h.

Prashant Purushotham Prabhu K

Zhenning Liu

Randy Fuller

Narendra Narasimha Rao

Vinod Kunnambath

Sanjay Kumar Chaudhary

Joseph Marotta

Karthik V J

Rohit Parashar

Muthukumar Murthy

Ezekiel Poulose Aikkaravelil

Nishanth Beedu

Peter Gramata

Stephen Young

Ezekiel A

A secondary power distribution box (SPDB), solid state power controller (SSPC) line replacement module or printed board assembly (LRM/PBA), integrated power distribution and avionics system, and method of power distribution are disclosed. For example, the method includes receiving electrical power from a power source at a power feeder network, communicating with at least one load of a plurality of loads at least in part over the power feeder network, and coupling the electrical power to the at least one load of the plurality of loads in response to the communicating.

Secondary electric power distribution system (SEPDS) to facilitate aircraft connectivity

A power supply includes a DC-DC converter, a boost converter, an energy storage element; and a voltage clamping circuit. The DC-DC converter is connected to a power source with an output voltage in a first voltage range. The voltage clamper circuit is configured to discharge at least a portion of energy of the energy storage element and to produce current at a clamped output voltage range that is substantially equal to the first voltage range. The discharged energy provides hold-up time for the power supply.

Hold up architecture for power supply with DC-DC converter

A system that drives multiple MOSFETs in parallel for direct current and alternating current solid state power controller applications may include networks connected to the gates of the MOSFETs to protect the MOSFETs from being damaged during high current interruption. For direct current applications, the system may include a switching protection and damping network and a gate drive balancing network. For alternating current applications, the system may include two switching protection and damping networks and a gate drive balancing network.

Approach for driving multiple MOSFETs in parallel for high power solid state power controller applications

Pre-charge circuitry allows capacitive loads connected to a solid state power controller to be gradually charged up by a PWM, generated with a cycle by cycle current limit, switching a single MOSFET in series with an inductor, before the SSPC is turned on. The pre-charge circuitry may require only three additional components, e.g., a MOSFET, an inductor and a diode, along with a designated MOSFET gate driver.

High power DC SSPC with capability of soft turn-on large capacitive loads

A coordinated arc fault protection scheme in a hierarchical power distribution system is disclosed. The methods according to embodiments of the present invention may be considered an 'event and time graded' analysis. In event and time based analysis, the number of confirmed arc signature may be monitored with respect to time in the main feeder line as well as the branched feeders. The confirmed arc signature in the branched feeder, as well as in the main feeder, may be captured and time stamped. A trip command may be issued first in the intended branched feeder if the branched feeder experiences a minimum number of events within a given time. During the same time period, the main feeder also monitors similar arcing events. If the tripping of the branched feeder occurs and the main feeder still detects arcing events, the main feeder may be tripped after a certain period of time or a certain number of confirmed arc signature. If there is no arc in the branched feeder and the main feeder itself experiences the arc, then the main feeder may be tripped after a predetermined period of time so that the current to all the branched feeders may be cut and the main feeder may be protected.

Method of ensuring the coordinated arc fault protection in a heirarchial power distribution system

Methods for detecting wet arc faults are based on the direct current (DC) signature analysis and pattern matching pertaining to wet arc characteristics. While magnifying some wet arc fault signatures, it may be found that the wet arc current signal itself resembles a normal current signal in both time and frequency domains. The change in magnitude or high frequency behavior found may not be enough to distinguish a wet arc fault signature from a normal signature. Embodiments of the present invention may look at the magnitude change in the DC content per cycle of the wet arc current signal, which may be more positive in one cycle while, in the next cycle, it may be negative in a relative manner. A particular number of these changes may be determinative of a wet arc fault.

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Bengaluru, India

Prashant Purushotham Prabhu K