Applied Materials, Inc.

Prashant Kumar Kulshreshtha

Kwangduk Douglas Lee

Sarah Michelle Bobek

Venkata Sharat Chandra Parimi

Bok Hoen Kim

Abdul Aziz Khaja

Ziqing Duan

Vinay K Prabhakar

Ganesh Balasubramanian

Karthik Thimmavajjula Narasimha

Xiaoquan Min

Juan Carlos Rocha-Alvarez

Zheng John Ye

Paul Dennis Connors

Saptarshi Basu

Sungwon Ha

Jianhua Zhou

Hari K Ponnekanti

Diwakar N Kedlaya

Rajesh Prasad

Fang Ruan

Harry S Whitesell

Hidetaka Oshio

Deven Matthew Raj Mittal

Jian Li

Amit Kumar Bansal

Dale Robert Du Bois

Martin Jay Seamons

Praket Prakash Jha

Sudha S Rathi

Kalyanjit Ghosh

Jeongmin Lee

Mandar Balasaheb Pandit

Viren Kalsekar

Venkatanarayana Shankaramurthy

Lei Jing

Venkataramana R Chavva

Jiarui Wang

Mohsin Waqar

Scott Falk

Liliya Krivulina

Liangfa Hu

Brett Berens

Byung Seok Kwon

Hiroyuki Ogiso

Rick Gilbert

Edward P Hammond

Satish Radhakrishnan

Milind Gadre

Dong H Lee

Dong Hyung Lee

Swayambhu Prasad Behera

Yoichi Suzuki

Jiheng Zhao

Satya Teja Babu Thokachichu

Hiroji Hanawa

Karthik Janakiraman

Rui Cheng

Susmit Singha Roy

Jay D Pinson, Ii

Mukund Srinivasan

Jian J Chen

Ren-Guan Duan

Eswaranand Venkatasubramanian

Zubin Huang

Umesh M Kelkar

Zhijun Jiang

Xing Lin

Ratsamee Limdulpaiboon

Anjana M Patel

Lu Xu

Uwe Paul Haller

Rajaram Narayanan

Jason K Foster

Bushra Afzal

Feng Bi

Hyung Je Woo

Satya Thokachichu

Vivien Chua

Byung Ik Song

Embodiments of the present disclosure generally relate to apparatus and methods for reducing substrate backside damage during semiconductor device processing. In one implementation, a method of chucking a substrate in a substrate process chamber includes exposing the substrate to a plasma preheat treatment prior to applying a chucking voltage to a substrate support. In one implementation, a substrate support is provided and includes a body having an electrode and thermal control device disposed therein. A plurality of substrate supporting features are formed on an upper surface of the body, each of the substrate supporting features having a substrate supporting surface and a rounded edge.

Methods and apparatus for minimizing substrate backside damage

Aspects of the present disclosure relate to one or more implementations of a substrate support for a processing chamber. In one implementation, a substrate support includes a body having a center, and a support surface on the body configured to at least partially support a substrate. The substrate support includes a first angled wall that extends upward and radially outward from the support surface, and a first upper surface disposed above the support surface. The substrate support also includes a second angled wall that extends upward and radially outward from the first upper surface, the first upper surface extending between the first angled wall and the second angled wall. The substrate support also includes a second upper surface extending from the second angled wall. The second upper surface is disposed above the first upper surface.

Electrostatic chuck design with improved chucking and arcing performance

Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about −100 MPa to about 100 MPa.

Ultra-high modulus and etch selectivity boron-carbon hardmask films

A plasma processing system is described. The system may include a showerhead. The system may further include a first RF generator in electrical communication with the showerhead. The first RF generator may be configured to deliver a first voltage at a first frequency to the showerhead. Additionally, the system may include a second RF generator in electrical communication with a pedestal. The second RF generator may be configured to deliver a second voltage at a second frequency to the pedestal. The second frequency may be less than the first frequency. The system may also include a terminator in electrical communication with the showerhead. The terminator may provide a path to ground for the second voltage. Methods of depositing material using the plasma processing system are described. A method of seasoning a chamber by depositing silicon oxide and silicon nitride on the wall of the chamber is also described.

Dual RF for controllable film deposition

In one or more embodiments, a method for depositing a carbon hard-mask material by plasma-enhanced chemical vapor deposition (PECVD) includes heating a substrate contained within a process chamber to a temperature in a range from about 100 C to about 700 C and producing a plasma with a power generator emitting an RF power of greater than 3 kW. In some examples, the temperature is in a range from about 300 C to about 700 C and the RF power is greater than 3 kW to about 7 kW. The method also includes flowing a hydrocarbon precursor into the plasma within the process chamber and forming a carbon hard-mask layer on the substrate at a rate of greater than 5,000/min, such as up to about 10,000/min or faster.

Plasma-enhanced chemical vapor deposition of carbon hard-mask

Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.

Highly etch selective amorphous carbon film

One or more embodiments described herein generally relate to methods for chucking and de-chucking a substrate to/from an electrostatic chuck used in a semiconductor processing system. Generally, in embodiments described herein, the method includes: (1) applying a first voltage from a direct current (DC) power source to an electrode disposed within a pedestal; (2) introducing process gases into a process chamber; (3) applying power from a radio frequency (RF) power source to a showerhead; (4) performing a process on the substrate; (5) stopping application of the RF power; (6) removing the process gases from the process chamber; and (7) stopping applying the DC power.

Electrostatic chucking process

Exemplary methods of semiconductor processing may include treating a surface of a substrate with a hydrogen-containing precursor. The substrate may be disposed within a processing region of a semiconductor processing chamber. The methods may include contacting the substrate with a tungsten-containing precursor. The methods may include forming an initiation layer comprising tungsten on the substrate. The methods may include treating the initiation layer with a hydrogen-containing precursor. The methods may include forming a plasma of the tungsten-containing precursor and a carbon-containing precursor. Hydrogen in the plasma may be limited to hydrogen included in the carbon-containing precursor. The methods may include forming a tungsten-containing hardmask layer on the initiation layer.

Reduced hydrogen deposition processes

Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.

Pedestal for substrate processing chambers

Embodiments of the present disclosure generally relate to a pedestal for increasing temperature uniformity in a substrate supported thereon. The pedestal comprises a body having a heater embedded therein. The body comprises a patterned surface that includes a first region having a first plurality of posts extending from a base surface of the body at a first height, and a second region surrounding the central region having a second plurality of posts extending from the base surface at a second height that is greater than the first height, wherein an upper surface of each of the first plurality of posts and the second plurality of posts are substantially coplanar and define a substrate receiving surface.

Heated pedestal design for improved heat transfer and temperature uniformity

Exemplary methods of semiconductor processing may include forming a silicon oxide material on exposed surfaces of a processing region of a semiconductor processing chamber. The methods may include forming a silicon nitride material overlying the silicon oxide material. The methods may include performing a deposition process on a semiconductor substrate disposed within the processing region of the semiconductor processing chamber. The methods may include performing a chamber cleaning process.

Reduced defect deposition processes

Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a central recess about the central axis extending from the second surface of the faceplate to a depth less than a thickness of the faceplate.

Faceplate having blocked center hole

Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a plurality of recesses extending about and radially outward of the plurality of apertures. Each recess of the plurality of recesses may extend from the second surface of the faceplate to a depth less than a thickness of the faceplate.

Faceplate with edge flow control

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San Jose, CA, United States of America

Prashant Kumar Kulshreshtha