Sandisk Technologies Inc.

Prasad Naidu

Deepak Pancholi

Jayanth Mysore Thimmaiah

Prashant Kumar Singhai

An electronic system may include a controller that measures a plurality of temperatures of the electronic system. Each of the plurality of temperatures may be indicated by one of a plurality of temperature voltages, each of which is generated across the same voltage-generation circuit. The controller and the voltage-generation circuit may be located on a component of the system, such as an integrated circuit, and external temperature sensors may provide their respective temperature signals to an input circuit located on the component. The controller may switch between activating and deactivating a temperature sensor located on the component and the input circuit to generate the plurality of temperature voltages across the voltage-generation circuit at different time intervals.

Multi-level temperature detection with offset-free input sampling

A high output voltage Vlevel and a low output voltage Vlevel parametric test system may include test circuitry coupled to output nodes of input/output (I/O) driver circuits. The test circuitry may source and sink current to the output nodes while the I/O driver circuits are in pull down and pull up states, respectively, in order to generate output voltages on the output nodes. The parametric test system may compare the output voltages with a plurality of high and low reference levels to determine ranges of the output voltages. The ranges may be used to determine whether the I/O driver circuits pass the Vand Vtest requirements. The V/Vtest system may be implemented on-chip with other components of the external device, which may eliminate the need to perform other parametric testing with external test equipment.

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A proposed inrush control circuit may work in the presence of supply noise. A linear regulator in bypass mode may be designed for inrush current control, but may be susceptible to irregularities from increased supply noise. The circuit may include a splitting of the bypass power MOS that are switched on with some delay during the power on to control the initial power-on inrush current.

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Bengaluru, India

Prasad Naidu