Alcatel Lucent

Alcatel

Prasad N Golla

Dominique Verchere

John Blanton

Gerard Damm

Mei Yang

Yijun Xiong

Hakki Cankaya

Emmanuel Dotaro

Laurent Ciavaglia

Farid Farahmand

Céline Haardt

Si Qing Zheng

Timochin Ozugur

A distributed and disjoint forwarding and routing system and method operable with a routing element having a scalable cluster-based architecture, wherein the control plane and data plane are loosely-coupled for effectuating non-disruptive switchover in the event of a failure. The routing element includes a partitionable data plane having one or more forwarding tables and a partitionable control plane having one or more routing tables operating under control of at least one routing protocol process. One or more update buffers are provided with respect to the forwarding and routing tables. A partitionable update agent module is disposed between the data and control planes for mediating the updating and coordination of the forward tables based on the routing tables.

Distributed and disjoint forwarding and routing system and method

A Parallel Round-Robin Arbiter (PRRA) system and method for arbitrating among N requesters. A plurality of leaf nodes that correspond to the N requesters form a directed ring of a hierarchical decision tree, wherein the leaf nodes are operable to propagate requests from the requesters. Each leaf node is provided with status logic operable to transmit its priority status for resolution of requests by the decision tree. Logic associated with the decision tree's nodes is operable to hierarchically resolve the requests propagated by the leaf nodes, wherein each leaf node is operable to transmit its grant to one of its immediate leaf node neighbors coupled to it via the directed ring for influencing the neighboring leaf node's priority status logic.

Parallel round-robin arbiter system and method

A scheduling system and method operable with a burst switching element wherein control information is provided to the switching element via a separate Burst Header that precedes data bursts on ingress data channels. In one embodiment, a series of scheduling determinations are made in a select order such that packet treatment (i.e., processing for transmission, buffering, or packet dropping) is optimized with respect to packet loss and available buffer space. In another embodiment, control information received in the Burst Headers is utilized to reserve output data channel bandwidth to future incoming data packets in a forward-looking scheduling mechanism.

Scheduling system and method for a burst switch

A look-up table (LUT)-based arbitration (LTA) system and methodology for use in a network switch element. Input control signals generated by ingress and egress entities associated with a cross-connect matrix of the network switch element are encoded into address information that is used for interrogating a storage structure. Pre-computed arbitration results based on a select arbiter scheme are stored into fields associated with the storage structure. When a particular input combination is applied with respect to an arbitration iteration, a selected arbitration result is obtained by querying the appropriate field, which is then decoded into a corresponding selected entity for the arbitration iteration.

Look-up table arbitration system and method for a fast switching element

A scheduling system and methodology for use in a network switch element having multiserver, multiple-arbiter architecture. Ingress ports and egress ports coupled to the cross-connect fabric of the network element are provided with multiple ingress and egress arbiters, respectively, for effectuating an iterative arbitration strategy such as RGA or RG. Arbiter architectures include singe-arbiter-per-port; single-arbiter-per-server; multiple-arbiters-per-port; and multiple-arbiters-per-server arrangements, wherein the arbiters can be implemented using RRA, BTA, Flexible Ring, or any other arbiter technology. Depending on the iteration strategy, ingress arbiter architecture and egress arbiter architecture, a variety of iterative, multiserver-capable scheduling algorithms can be obtained, which scheduling algorithms can also be implemented in QoS-aware network nodes.

Multiserver scheduling system and method for a fast switching element

A binary-tree-based arbitration system and methodology with attributes that approximate a Generalized Processor Sharing (GPS) scheme for rendering fairer service grants in an environment having a plurality of competing entities. Arbitration based on probabilistic control of arbiter nodes' behavior is set forth for alleviating the inherent unfairness of a binary tree arbiter (BTA). In one implementation, BTA flag direction probabilities are computed based on composite weighted functions that assign relative weights or priorities to such factors as queue sizes, queue ages, and service class parameters. Within this general framework, techniques for desynchronizing a binary tree's root node, shuffling techniques for mapping incoming service requests to the BTA's inputs, and multi-level embedded trees are described.

Growing community of inventors

Plano, TX, United States of America

Prasad N Golla