Micron Technology Incorporated

Pranav P Sharma

Sanjeev Sapra

Vinay Nair

Jerome A Imonigie

Ramaswamy Ishwar Venkatanarayanan

Eric E Kron

Some embodiments include a method in which an assembly is formed to have a first silicon-dioxide-containing-material and a second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material has a higher concentration of dopant therein than does the second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material is selectively removed relative to the second silicon-dioxide-containing-material using a mixture which includes hydrofluoric acid, a second acid and an organic solvent. The organic solvent may include at least one ester and/or at least one ether. The second acid may have a pKa of less than about 5.

Methods for selectively removing more-doped-silicon-dioxide relative to less-doped-silicon-dioxide

Some embodiments include an integrated assembly having a region of first semiconductor material. The region has an upper surface along a cross-section. The upper surface has a flat-topped peak and a concavity adjacent the flat-topped peak. A pillar of second semiconductor material is over the region and directly against the region. The pillar extends vertically from the upper surface. Some embodiments include a method of forming an integrated assembly. A construction is formed to have a semiconductor region, and to have an insulative region extending over the semiconductor region and alongside the semiconductor region. A combination of three etches is utilized to expose an upper surface of the semiconductor region and to modify the upper surface of the semiconductor region to form said upper surface to include, along a cross-section, a flat-topped peak portion and an adjacent concavity portion.

Semiconductor assemblies having semiconductor material regions with contoured upper surfaces; and methods of forming semiconductor assemblies utilizing etching to contour upper surfaces of semiconductor material

Semiconductor assemblies having semiconductor material regions with contoured upper surfaces

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Boise, ID, United States of America

Pranav P Sharma