Lucent Technologies Inc.

At+t Corp.

At&t Bell Laboratories

American Telephone & Telegraph Co., At&t Bell Laboratories

Pramod Vasant Argade

Shaun Patrick Whalen

Michael Richard Betker

Arupratan Gupta

Michael R Betker

A microprocessor includes a multiply-accumulate unit (MAU) for performing high-speed signal processing operations. First and second caches provide first and second operands (x, y) directly to the MAU when a multiply-accumulate (MAC) instruction is executed. In addition, a multiplexer is included to select data from either the first and second caches when a normal instruction is executed. A translation look-aside buffer may be included that has page table entries that include additional &ldquo;reconfigure&rdquo; and &ldquo;way&rdquo; bits to control writing data into the caches. In this manner, the microprocessor may use a conventional n-way set-associative cache to simultaneously access two or more operands.

Microprocessor with an instruction level reconfigurable n-way cache

In a telephone answering system, announcements are pre-recorded to elicit from a caller one or more attributes and details of a message. Such attributes may include the identity of the caller, the purpose of the call, etc. Information concerning each attribute of the message is stored in the system separate from the message details. By reviewing at least one attribute of each message saved on the system, the called party is able to identify any messages of interest before listening to any message details. The called party may then retrieve the message details of each identified message.

Technique for efficiently accessing telephone messages

A multi-function device has a user interface with two buttons that are operated using a two-button protocol to generate function messages and instruction messages. Each function message identifies or describes one of the different functions of the device, while each instruction message corresponds to one of the instruction steps for one of the device functions. The user interface generates signals to control presentation of the function and instruction messages. The device also has a message processor that generates the function and instruction messages based on the signals from the user interface as well as a message rendering component to render the function and instruction messages. In one embodiment, the various function and instruction messages are audio messages and the message rendering component is a speaker, although other, non-visual messages could be used instead. The message processor may be implemented as part of a single chip processor that has an input-output component, a data memory component, and a central processing unit. In addition to instruction and function messages, the two-button user interface can be used to generate troubleshooting messages.

Two-button protocol for generating function and instruction messages for

A digital microprocessor having a processor core is provided with trace recording hardware capable of receiving, analyzing and temporarily storing data indicative of program instructions (i.e., instruction types) executed by the processor core and of their respective addresses. The trace recording hardware outputs an abbreviated real-time program trace, containing minimum data necessary to reconstruct a full program trace, via a JTAG port to an external debug host computer where a user may reconstruct the full program trace with reference to a program listing. The abbreviation scheme used by the trace recording hardware is preferably achieved by comparing instruction types received from the processor core to at least one pre-defined instruction type, and abbreviating or discarding the corresponding address information as a function of the particular instruction type. The trace recording hardware may be set into one of two modes by the user. In the first mode, the trace recording hardware stalls the processor core when it reaches its maximum storage capacity for instruction type and/or address data until storage becomes available. In the second mode, when the trace recording hardware becomes full it discards data received from the processor core and stores an overflow indicator. The program trace may be initiated and stopped by the user or by signals internal to the digital microprocessor.

Apparatus and method for real-time program monitoring via a serial

A telephone answering machine and method of use utilizes speech recognition to identify a caller from a pre-defined list of possible callers. The list may be generated by various input techniques, including a spoken voice at the called party's location, and keyboard or graphical input techniques. If the caller is identified as being on the list, the machine allows the call to progress along a first sequence, which includes ringing the called phone. If the called phone does not answer, the first sequence may provide for responding with a customized message for the calling party. If the caller is not identified as being on the list, the machine allows the call to progress along a second sequence, which includes responding with a standard recorded message. In either case, the caller is typically allowed to record a message for the called party. Additional pre-defined lists may be provided, as for determining the context of a call.

Digital secretary

This arbitration unit includes a request controller and two bus controllers. The request controller monitors the instruction fetch or data requests and causes the two bus controllers to implement an instruction fetch or data transfer through one of the two memory interfaces based upon a preassigned priority. Based upon at least one address bit or a control bit contained on a memory management translation table, the request controller identifies which of the memory interfaces to utilize to fetch or transfer data. Preferably, one of the storage areas is random-access memory and the other is read-only memory containing program instructions and read-only data.

Apparatus and method for computer processing using an enhanced Harvard

When performing fixed point multiplication with 32 bit operands for example, the product is, in general, represented by a 64 bit number. However, a typical microprocessor may compute the product to only 32 bits. Therefore, the possibility of overflow exists. The present invention provides an indication as to the status of the upper (most significant) 32 bits of the product. This indication may include both 'carry' and 'overflow' flags, which are unsigned and signed overflow, respectively. The inventive technique is implemented in hardware that is used in conjunction with a Booth recoding multiplier.

Multiplier signed and unsigned overflow flags

A TTL to CMOS static input buffer, and method for making same, having a first transistor (32) of a first conductivity type, having a control terminal responsive to a TTL input signal, a first output terminal coupled to a first voltage supply (Vdd) and a second output terminal; a second transistor (31) of a second conductivity type, having a predetermined threshold voltage, a predetermined width-to-length ratio, a control terminal responsive to the TTL input signal, a first output terminal coupled to an output node and a second output terminal coupled to a second voltage supply; a third transistor (33) of the second conductivity type, having a predetermined threshold voltage, a predetermined width-to-length ratio, a control terminal coupled to an intermediate voltage source, a first output terminal coupled to the second terminal of the first transistor and a second output terminal coupled to the output node; and a CMOS inverter (35) having a predetermined threshold voltage Vb; wherein the static input buffer has a predetermined threshold voltage established by the threshold voltage of the CMOS inverter and the ratio of the width-to-length ratio of the third transistor to the width-to-length ratio of the second transistor, when the buffer is enabled by the voltage of the intermediate voltage source being substantially that of the first voltage supply.

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Allentown, PA, United States of America

Pramod Vasant Argade