Lsi Logic Corporation

Maxim Integrated Products, Inc.

Nchip, Inc.

Lsi Corporation

Pradip Dhirajlal Patel

Manickam Thavarajah

Maurice O Othieno

Severino A Legaspi, Jr

Ajay Kumar Ghai

Steven D Cate

David B Tuckerman

Aritharan Thurairajaratnam

Hong Tee Lim

Steve Detlev Cate

Proximity sensor devices are described that integrate a light emitting diode with a light sensor assembly in a single, compact package. The proximity sensor devices comprise a substrate having a surface. The light emitting diode and light sensor assembly are mounted to the substrate proximate to the surface. The light emitting diode is configured to emit electromagnetic radiation in a limited spectrum of wavelengths, while the light sensor assembly is configured to detect electromagnetic radiation in the limited spectrum of wavelengths emitted by the light emitting diode. An encapsulation layer is formed on the surface over the light emitting diode and light sensor assembly. A trench is formed in the encapsulation layer to receive electromagnetic radiation blocking material configured to block electromagnetic radiation in the limited spectrum of wavelengths to at least partially mitigate crosstalk between the light emitting diode and the light sensor assembly.

Proximity sensor device

A bump contact electrically connects a conductor on a substrate and a contact pad on a semiconductor device mounted to the substrate. The first end of an electrically conductive pillar effects electrical contact and mechanical attachment of the pillar to the contact pad with the pillar projecting outwardly from the semiconductor device. A solder crown reflowable at a predetermined temperature into effecting electrical contact and mechanical attachment with the conductor is positioned in axial alignment with the second end of the pillar. A diffusion barrier electrically and mechanically joins the solder bump to the second end of the pillar and resists electro-migration into the first end of the solder crown of copper from the pillar. One diffusion barrier takes the form of a 2-20 micron thick control layer of nickel, palladium, titanium-tungsten, nickel-vanadium, or tantalum nitride positioned between the pillar and the solder crown.

Bump I/O contact for semiconductor device

Proximity sensor devices are described that integrate a light emitting diode with a light sensor assembly in a single, compact package. The proximity sensor devices comprise a lead frame having a surface. The light emitting diode and light sensor assembly are mounted to the lead frame proximate to the surface. The light emitting diode is configured to emit electromagnetic radiation in a limited spectrum of wavelengths, while the light sensor assembly is configured to detect electromagnetic radiation in the limited spectrum of wavelengths emitted by the light emitting diode. An encapsulation layer is formed on the surface over the light emitting diode and light sensor assembly. A trench is formed in the encapsulation layer to receive electromagnetic radiation blocking material configured to block electromagnetic radiation in the limited spectrum of wavelengths to at least partially mitigate crosstalk between the light emitting diode and the light sensor assembly.

A semiconductor integrated circuit package incorporating a preformed one-piece mold cap and heatspreader assembly is disclosed. One implementation includes a substrate with a die attached to the substrate. The die is electrically connected with electrical connections formed on the substrate using bonding wires. A preformed one-piece integrated mold cap and heatspreader assembly attached to the substrate to enclose at least a portion of the bonding wires and the die. Methods of assembling semiconductor integrated circuit packages using a preformed one-piece integrated mold cap and heatspreader assembly are also disclosed.

Semiconductor package and process utilizing pre-formed mold cap and heatspreader assembly

Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate having an integrated circuit die attached thereto. The substrate includes at least one electrical ground plane and includes a plurality solder balls formed on a surface thereof. The solder balls include a set of 'thermal' solder balls that are positioned near the perimeter of the package and electrically connected with a ground plane of the package. The IC die is electrically connected with the ground plane that is connected with the 'thermal' solder balls. A heat spreader is mounted on the package with conductive mounting pegs that are electrically connected with the ground plane. The heat spreader is in thermal communication with the die and also in thermal communication with the set of &#x201c;thermal&#x201d; solder balls. This configuration enables a portion of the heat generated by the die to be dissipated from the die through the heat spreader into the set of &#x201c;thermal&#x201d; solder balls. Additionally, the package can be configured so that the combination of the electrically connected heat spreader, ground plane, and conductive mounting pegs operate together as a electromagnetic shield that reduces the amount of electrical noise of the package.

Semiconductor package having a thermally and electrically connected heatspreader

A method of shielding an integrated circuit from electromagnetic interference. The integrated circuit is at least partially encapsulated within an electromagnetic interference resistant molding compound, and then the integrated circuit is completely encapsulated within a second molding compound. In this manner, the electromagnetic interference resistant molding compound protects the integrated circuit from electromagnetic interference, while the second molding compound can be selected for properties traditionally desired in a molding compound, such as thermal, electrical insulating, and structural properties. Thus, the integrated circuit according to the present invention can be placed closer to structures, such as power supplies, which produce electromagnetic interference, without experiencing an unacceptable degradation of performance due to the electromagnetic interference caused by the structures.

Electromagnetic interference package protection

A method of forming electrically conductive elements on a base layer of an electronic substrate without the use of solder mask. A layer of electrically conductive material is deposited on the base layer, and a first layer of photo imageable ink is applied over the electrically conductive material layer. The first layer of photo imageable ink is patterned to expose portions of the electrically conductive material layer, which are then etched to resolve traces in the electrically conductive material layer. The first layer of photo imageable ink is removed, and a second layer of photo imageable ink is applied over the traces and channels between the traces. The second layer of photo imageable ink is then patterned to expose the traces, and a third layer of photo imageable ink is applied over the traces and the second layer of photo imageable ink. The third layer of photo imageable ink is patterned to expose deposition sites on the traces, within which are formed electrically conductive fingers. Both the second layer and the third layer of photo imageable ink are retained on the electronic substrate.

Electronic organic substrate

A package substrate having sides, which is formed of multiple non electrically conductive layers laminated together. Each of the multiple non electrically conductive layers is formed of a first lamina and a second lamina bonded together in a resin matrix. The first lamina is formed of woven fibers having a first warp. The first warp of the first lamina is disposed at a positive orientation of a first angle from the sides of the package substrate, where the first angle is neither zero degrees nor ninety degrees. The second lamina is also formed of woven fibers, having a second warp. The second warp of the second lamina is disposed at a negative orientation of the first angle from the sides of the package substrate. Electrically conductive layers are dispersed between different ones of the multiple non electrically conductive layers, with electrical connections dispersed between different ones of the electrically conductive layers.

Electronic substrate

A method of forming a via in a circuit, such that parasitic capacitance is reduced. The surface layers of the circuit are identified, to which continuity with the via is desired, and secondary layers of the circuit are also identified. Via lands are formed only on the surface layers and not on the secondary layers. The via lands are formed in first portions of the surface layers, where the via is to pass through the surface layers. Nonconductive cut outs are formed in second portions of the secondary layers where the via is to pass through the secondary layers. The surface layers and the secondary layers of the circuit are laminated together. The first portions of the surface layers are aligned with the second portions of the secondary layers. A through hole is formed through the via lands formed in the surface layers, and also through the cut outs formed in the secondary layers. The via is formed in the through hole. The parasitic capacitance of the via is reduced by not having via lands on the secondary layers.

Integrated circuit package via

A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.

Growing community of inventors

Redwood City, CA, United States of America

Pradip Dhirajlal Patel