Intel Corporation

Pradeep Ramani

Joydeep Ray

Prasoonkumar Surti

Elmoustapha Ould-Ahmed-Vall

Rajesh Poornachandran

Ben J Ashbaugh

Chandrasekaran Sakthivel

Oguz Hasan Elibol

Anil Thomas

Jayaram Bobba

Gokce Keskin

Kumar Balasubramanian

Jerin C Justin

Ting Gong

Guozhong Zhuang

Bhavani Subramanian

Rama Harihara

Jing Huang

Xiaoming Cui

Timothy B Costa

Vasanth Ranganathan

James A Valerio

Karthik Vaidyanathan

A graphics processing device is provided that includes a set of compute units to execute a workload, a cache coupled with the set of compute units, and circuitry coupled with the cache and the set of compute units. The circuitry is configured to, in response to a cache miss for the read from a first cache, broadcast an event within the graphics processor device to identify data associated with the cache miss, receive the event at a second compute unit in the set of compute units, and prefetch the data identified by the event into a second cache that is local to the second compute unit before an attempt to read the instruction or data by the second thread.

Instruction prefetch based on thread dispatch commands

Embodiments are generally directed to compression in machine learning and deep learning processing. An embodiment of an apparatus for compression of untyped data includes a graphical processing unit (GPU) including a data compression pipeline, the data compression pipeline including a data port coupled with one or more shader cores, wherein the data port is to allow transfer of untyped data without format conversion, and a 3D compression/decompression unit to provide for compression of untyped data to be stored to a memory subsystem and decompression of untyped data from the memory subsystem.

Compression of machine learning models utilizing pseudo-labeled data training

Dynamic assignment of down sampling intervals for data stream processing

A graphics processing device comprises a set of compute units to execute multiple threads of a workload, a cache coupled with the set of compute units, and a prefetcher to prefetch instructions associated with the workload. The prefetcher is configured to use a thread dispatch command that is used to dispatch threads to execute a kernel to prefetch instructions, parameters, and/or constants that will be used during execution of the kernel. Prefetch operations for the kernel can then occur concurrently with thread dispatch operations.

Policy-based system interface for a real-time autonomous system

A mechanism is described for facilitating efficient prediction of most commonly occurring values in data blocks in computing environments. An apparatus of embodiments, as described herein, includes one or more processors to perform parallel calculations on values associated with multiple sub-blocks of a data block, and predict, based on the parallel calculations, a most commonly-occurring value in the data block. The apparatus if further to classify the most commonly-occurring value as a mode value for one or more data types to be used with one or more applications.

Efficient prediction of most commonly occuring values in data blocks in computing environments

Compression in machine learning and deep learning processing

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Milpitas, CA, United States of America

Pradeep Ramani