International Business Machines Corporation

Pradeep N Chatnahalli

Santosh Balasubramanian

Cedric Lichtenau

Andreas Koenig

Mitesh A Agrawal

Prasad Shivaram

Rajeev Potharlanka

A protection circuit can be used with a computer system having a master device and at least one slave device that are connected by an inter-integrated circuit (I2C) bus. A first access request is received that includes an address that identifies a first slave device. In response to a permissible mode, the first access request is communicated to the first slave device using the I2C bus. A sticky protection bit can be set. In response to the sticky protection bit being set, the protection circuit can be placed in a protected mode. A second access request is received. The second access request can be determined to be a protected access to the first slave device. In response to the determining and the protected mode, the second access request to the first slave device can be denied.

Data access protection for computer systems

A processor determines a timestamp for a signal based on a number of consecutive cycles that the signal is present on a trace bus. The processor writes a first part of the timestamp to a memory that is allocated for a timestamp of a trace entry. The processor overwrites one or more identified free bits with a second part of the timestamp of the trace entry.

Dynamic allocation of trace array timestamp data

Methods for allocating spare latch circuits to logic blocks in an integrated circuit design are provided. A method includes determining logic blocks in the design and determining and determining an allocation of spare latch circuits among the logic blocks based on respective attributes of the logic blocks. The method further include placing the spare latch circuits in the design in accordance with the determined allocation based on local clock buffers corresponding with the logic blocks.

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Shimoga, India

Pradeep N Chatnahalli