Qualcomm Incorporated

Cypress Semiconductor Corporation

Pradeep Kumar Mishra

Roberto Averbuj

Rajat Gupta

Rajat Rajinderkumar Dhawan

Thomas Mathew

K S Anil

Techniques for efficient KASUMI ciphering are disclosed. In one aspect, one KASUMI round for generating a fractional portion of the KASUMI cipher is deployed with appropriate feedback such that eight sequential rounds produce the KASUMI output. In another aspect, one third of the FO function is deployed with appropriate feedback such that three successive cycles produce the FO output. In yet another aspect, the FI function is deployed with appropriate feedback such that two subsequent cycles produce the FI output. In yet another aspect, a sub-key generator comprising two shift registers produces sub-keys for each round and sub-stage thereof in an efficient manner. These aspects, collectively, yield the advanced benefits of low area and low cost implementations of KASUMI with a simple user interface. Various other aspects of the invention are also presented.

Apparatus and method for performing KASUMI ciphering

An apparatus comprising a first circuit and a timing circuit. The first circuit may be configured to generate an output clock signal that may compensate for oscillation build-up and stabilization time after a power up. The timer circuit may be configured to provide timing in response to the output clock signal.

Compensation of crystal start up for accurate time measurement

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San Diego, CA, United States of America

Pradeep Kumar Mishra