Applied Materials, Inc.

Prabhat Kumar

Ajay Kumar

Brad Eaton

Wei-Sheng Lei

James S Papanu

Jungrae Park

Alexander N Lerner

Hari K Ponnekanti

Lin Zhang

Michael P Stewart

Wenguang Li

Kapila P Wijekoon

Martin S Wohlert

Ramesh Krishnamurthy

Kalyan Rapolu

Light-absorbing masks and methods of dicing semiconductor wafers are described. In an example, a method of dicing a semiconductor wafer including a plurality of integrated circuits involves forming a mask above the semiconductor wafer. The mask includes a water-soluble matrix based on a solid component and water, and a light-absorber species throughout the water-soluble matrix. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask with gaps and corresponding trenches in the semiconductor wafer in regions between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the patterned mask to extend the trenches and to singulate the integrated circuits. The patterned mask protects the integrated circuits during the plasma etching.

Light-absorbing mask for hybrid laser scribing and plasma etch wafer singulation process

Etch masks and methods of dicing semiconductor wafers are described. In an example, an etch mask for a wafer singulation process includes a water-soluble matrix based on a solid component and water. The etch mask also includes a plurality of particles dispersed throughout the water-soluble matrix. The plurality of particles has an average diameter approximately in the range of 5-100 nanometers. A ratio of weight % of the solid component to weight % of the plurality of particles is approximately in the range of 1:0.1-1:4.

Etch mask for hybrid laser scribing and plasma etch wafer singulation process

Improved wafer coating processes, apparatuses, and systems are described. In one embodiment, an improved spin-coating process and system is used to form a mask for dicing a semiconductor wafer with a laser plasma dicing process. In one embodiment, a spin-coating apparatus for forming a film over a semiconductor wafer includes a rotatable stage configured to support the semiconductor wafer. The rotatable stage has a downward sloping region positioned beyond a perimeter of the semiconductor wafer. The apparatus includes a nozzle positioned above the rotatable stage and configured to dispense a liquid over the semiconductor wafer. The apparatus also includes a motor configured to rotate the rotatable stage.

Wafer coating

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side of the semiconductor wafer includes adhering a back side the semiconductor wafer on the dicing tape of a substrate carrier. Subsequent to adhering the semiconductor wafer on a dicing tape, the dicing tape is treated with a UV-cure process. Subsequent to treating the dicing tape with the UV-cure process, a dicing mask is formed on the front side of the semiconductor wafer, the dicing mask covering and protecting the integrated circuits. The dicing mask is patterned with a laser scribing process to provide gaps in the dicing mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the dicing mask layer to singulate the integrated circuits.

UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach

Methods and systems for dicing a semiconductor wafer including a plurality of integrated circuits (ICs) are described. In one embodiment, a method involves adhering an adhesive tape to a thin water soluble dry film. The method involves applying the thin water soluble dry film adhered to the adhesive tape over a surface of the semiconductor wafer. The method involves removing the adhesive tape from the thin water soluble dry film. The thin water soluble dry film is patterned with a laser scribing process, exposing regions of the semiconductor wafer between the ICs. The method involves etching the semiconductor wafer through gaps in the patterned thin water soluble dry film, and removing the thin water soluble dry film.

Water soluble mask formation by dry film vacuum lamination for laser and plasma dicing

Embodiments of the invention include methods and apparatuses for outgassing a workpiece prior to a plasma processing operation. An embodiment of the invention may comprise transferring a workpiece having a mask to an outgassing station that has one or more heating elements. The workpiece may then be heated to an outgassing temperature that causes moisture from the mask layer to be outgassed. After outgassing the workpiece, the workpiece may be transferred to a plasma processing chamber. In an additional embodiment, one or more outgassing stations may be located within a process tool that has a factory interface, a load lock coupled to the factory interface, a transfer chamber coupled to the load lock, and a plasma processing chamber coupled to the transfer chamber. According to an embodiment, an outgassing station may be located within any of the components of the process tool.

Method of outgassing a mask material deposited over a workpiece in a process tool

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a line shaped laser beam profile laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a top hat laser beam profile laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

Hybrid wafer dicing approach using a rectangular shaped two-dimensional top hat laser beam profile or a linear shaped one-dimensional top hat laser beam profile laser scribing process and plasma etch process

Methods of using a screen-print mask for hybrid wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits separated by streets involves screen-printing a patterned mask above the semiconductor wafer, the patterned mask covering the integrated circuits and exposing the streets of the semiconductor wafer. The method also involves laser ablating the streets with a laser scribing process to expose regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the exposed regions of the semiconductor wafer to singulate the integrated circuits. The patterned mask protects the integrated circuits during the plasma etching.

Screen print mask for laser scribe and plasma etch wafer dicing process

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves laminating a polymeric mask layer onto a front side of the semiconductor wafer by dry film vacuum lamination, the polymeric mask layer covering and protecting the integrated circuits. The method also involves patterning the polymeric mask layer with a laser scribing process to provide gaps in the polymeric mask layer, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the gaps in the polymeric mask layer to singulate the integrated circuits. The method also involves, subsequent to plasma etching the semiconductor wafer, removing the polymeric mask layer.

Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves applying an adhesive layer to a front side of the semiconductor wafer. A mask layer is laminated onto the front side of the semiconductor wafer, the mask layer covering and protecting the integrated circuits. The adhesive layer adheres the mask layer to the front side of the semiconductor wafer. The mask layer is patterned with a laser scribing process to provide gaps in the mask layer, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the mask layer to singulate the integrated circuits.

Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination

A method and system of hybrid dicing using a blade and laser are described. In one embodiment, a method involves focusing a laser beam inside the substrate in regions between the integrated circuits, inducing defects inside the substrate in the regions. The method also involves forming a groove on a surface of the substrate with a blade saw in the regions. The method further involves singulating the integrated circuits at the regions with the induced defects and the groove. In one embodiment, a system includes a laser module configured to focus a laser beam inside the substrate in regions between the integrated circuits, inducing defects inside the substrate in the regions. A blade grooving module is configured to form a groove in a surface of the substrate with a blade saw in the regions.

Hybrid dicing process using a blade and laser

Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves introducing a substrate supported by a substrate carrier into a plasma etch chamber. The substrate has a patterned mask thereon covering integrated circuits and exposing streets of the substrate. The substrate carrier has a backside. The method also involves supporting at least a portion of the backside of the substrate carrier on a chuck of the plasma etch chamber. The method also involves cooling substantially all of the backside of the substrate carrier, the cooling involving cooling at least a first portion of the backside of the substrate carrier by the chuck. The method also involves plasma etching the substrate through the streets to singulate the integrated circuits while performing the cooling substantially all of the backside of the substrate carrier.

Dicing tape thermal management by wafer frame support ring cooling during plasma dicing

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide gaps in the mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the gaps in the mask to singulate the integrated circuits. The method also involves, subsequent to plasma etching the semiconductor wafer, removing etch residue from sidewalls of the singulated integrated circuits.

Residue removal from singulated die sidewall

Embodiments of the present invention are directed to processes for making solar cells by simultaneously co-firing metal layers disposed both on a first and a second surface of a bifacial solar cell substrate. Embodiments of the invention may also provide a method forming a solar cell structure that utilize a reduced amount of a silver paste on a front surface of the solar cell substrate and a patterned aluminum metallization paste on a rear surface of the solar cell substrate to form a rear surface contact structure. Embodiments can be used to form passivated emitter and rear cells (PERC), passivated emitter rear locally diffused solar cells (PERL), passivated emitter, rear totally-diffused (PERT), 'iPERC,' Crystalline Reduced-cost Aluminum Fire-Through (CRAFT), pCRAFT, nCRAFT or other high efficiency cell concepts.

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Fremont, CA, United States of America

Prabhat Kumar