Texas Instruments Corporation

Prabhakar Bhimrao Ghate

Clyde R Fuller

Arthur M Wilson

Robert C Hooper

Neal Jay Tolar

A microelectronic integrated circuit having first and second levels of thin-film metallization separated by an insulation layer is provided with a system for electrical interconnections between metallization levels, at selected locations, without requiring extra spacing between metal paths, in either the first or second levels. Maximum circuit density is thereby permitted, with no restriction on the placement of interconnection vias. Circuit layout is greatly simplified because all metal paths have uniform widths and minimum spacings, achieved with the use of vias that are 'oversized' in both the transverse and longitudinal directions. Consequently, it is required that second level metal differ in composition from first level metal, and be patterned with an etchant that does not attack first level metal.

Maximum density interconnections for large scale integrated circuits

A process has been developed for fabricating a nonpolar low loss thin film capacitor utilizing tantalum oxide for high capacitance per unit area as a dielectric which is deposited in film form relative to a suitable substrate. A counter electrode is deposited on a substrate. A film of metal having a high recrystallization temperature is deposited on the counter electrode. This deposition forms the bottom electrode of the capacitor structure. The metal film has a quality thermal expansion resistance and a high reliability in thermal environments.

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Dallas, TX, United States of America

Prabhakar Bhimrao Ghate