Qualcomm Incorporated

Prabaharan Balu

Sei Seung Yoon

Venugopal Boynapalli

Bilal Zafar

Alex Dongkyu Park

Kashyap Ramachandra Bellur

An example scannable register file includes a plurality of memory cells and, a shift phase of a scan test shifts data bits from a scan input through the plurality of memory cells to a scan output. The shifting can be performed by, on each clock cycle, reading one of the plurality of memory cells to supply the scan out and writing one of the plurality of memory cells with the data bit on a scan input. To perform sequential reads and writes on each clock cycle, the scannable register can generate a write clock that, during the shift phase, is inverted from the clock used for functional operation. The write clock is generated without glitches so that unintended writes do not occur. Scannable register files can be integrated with scan-based testing (e.g., using automatic test pattern generation) of other modules in an integrated circuit.

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Banagalore KRN, India

Prabaharan Balu