International Business Machines Corporation

Poornima P Sulibele

Pak-kin Mak

Robert J Sonnelitter, Iii

Michael Andrew Blake

Deanna Postles Dunn Berger

Jie Zheng

Gary E Strait

Guy G Tracy

Chad G Wilson

James F Driftmyer

Timothy W Steele

Aspects of the invention include computer-implemented methods, systems, and computer program products that assign a centralized event tag to each communication interface of a plurality of communication interfaces of a chip interconnected in a hierarchy through the communication interfaces to a plurality of chips in a multiprocessing system. A determination is performed of whether to accept or drop a message associated with an event received at one of the communication interfaces of the chip based on comparing a local centralized event tag with a received centralized event tag. The local centralized event tag is updated based on one or more advancing rules to maintain event synchronization between the chip and the plurality of chips.

System event broadcast synchronization across hierarchical interfaces

A computer implemented method for avoiding false activation of hang avoidance mechanisms of a system is provided. The computer implemented method includes receiving, by a nest of the system, rejects from a processor core of the system. The rejects are issued based on a cache line being locked by the processor core. The computer implemented method includes accumulating the rejects by the nest. The computer implemented method includes determining, by the nest, when an amount of the rejects accumulated by the nest has met or exceeded a programmable threshold. The computer implemented method also includes triggering, by the nest, a global reset to counters of the hang avoidance mechanisms of a system in response to the amount meeting or exceeding the programmable threshold.

Deadlock avoidance in a multi-processor computer system with extended cache line locking

Growing community of inventors

Bengaluru, India

Poornima P Sulibele