Sony Semiconductor Solutions Corporation

Pooria Mostafalu

Frederick T Brady

Hongyi Mi

Sungin Hwang

Sungin Han

Ping Wah Wong

Giri Mehta

An imaging device includes a plurality of unit pixels disposed into pixel groups that are separated from one another by isolation structures. Unit pixels within each pixel group are separated from one another by isolation structures and share circuit elements. The isolation structures between pixel groups are full thickness isolation structures. At least a portion of the isolation structures between unit pixels within a pixel group are deep trench isolation structures.

Solid-state imaging device and imaging device with shared circuit elements

An imaging device with a plurality of image sensing pixels and a plurality of event detection pixels is provided. Each image sensing pixel includes a photoelectric conversion element and an imaging signal generation readout circuit. The image sensing readout circuit can be shared by a plurality of photoelectric conversion elements. Each event detection pixel includes a photoelectric conversion element and an event detection readout circuit. The event detection readout circuit can be shared by a plurality of photoelectric conversion elements. In addition, the photoelectric conversion element of an event detection pixel can be selectively connected to a shared imaging signal generation readout circuit. The number of image sensing pixels is greater than the number of event detection pixels. In addition, the area of a photoelectric conversion element of an event detection pixel can be greater than the area of a photoelectric conversion element of an image sensing pixel.

Solid-state imaging device and imaging device with combined dynamic vision sensor and imaging functions

An imaging device includes a first pixel. The first pixel includes a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges. The first pixel includes a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The imaging device includes at least one bonding pad on the first substrate and in electrical contact with the first converter. The at least one bonding pad overlaps at least part of the first pixel.

Imaging devices and imaging apparatuses, and methods for the same

An imaging device includes a plurality of unit pixels or pixels, with each pixel separated from every other unit pixel by an isolation structure. Each unit pixel includes a photoelectric conversion unit, a pixel imaging signal readout circuit, and an address event detection readout circuit. A first transfer transistor selectively connects the photoelectric conversion unit to the pixel imaging signal readout circuit, and a second transfer transistor selectively connects the photoelectric conversion unit to the address event detection readout circuit. The photoelectric conversion unit, the pixel imaging signal readout circuit, the address event detection readout circuit, and the first and second transfer transistors for a given pixel are located within a pixel area defined by the isolation structure. The isolation structure may be in the form of a full thickness dielectric trench isolation structure.

An imaging device includes a first pixel including a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges, and a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The first converter includes a first transistor coupled to the first photoelectric conversion region and a second transistor coupled to the first transistor. The imaging device includes a wiring layer on the first substrate and includes a first level of wirings arranged in a first arrangement overlapping the first photoelectric conversion region and in a second arrangement overlapping the first and second transistors, the second arrangement being different than the first arrangement.

Binning in a hybrid pixel structure of image pixels and event vision sensor (EVS) pixels. In one embodiment, the imaging sensor includes a pixel array including a plurality of pixel circuits and a plurality of binning transistors. A first portion of the plurality of pixel circuits individually includes an intensity photodiode. A second portion of the plurality of pixel circuits individually includes an event vision sensor (EVS) photodiode. The plurality of binning transistors is configured to bin together at least one of the first portion or the second portion.

Binning in hybrid pixel structure of image pixels and event vision sensor (EVS) pixels

Image sensing devices are disclosed. In one example, an image sensing device includes a pixel unit cell with both event sensing (EVS) pixels and imaging pixels. The EVS and imaging pixels are configured to include event sensing and imaging pixel transistors formed in the same transistor layer of an integrated circuit assembly that also includes the photodiodes of the EVS and imaging pixels. The photodiodes are separated by a rear deep trench isolation (RDTI), and the EVS and imaging pixel transistors are arranged along (e.g., underneath) boundary areas formed by the RDTI, maximizing the space available for the photodiodes and economizing on wiring requirements for the EVS and imaging pixels.

Image sensing device with event based vision sensor pixels and imaging pixels

A pixelated image sensor capable of simultaneously supporting an EVS mode and an image-frame capture mode of operation. An individual pixel of the sensor comprises two distinct sets of subpixels involved in the two modes, respectively, and at least two corresponding, functionally different and independent electrical circuits. The metal interconnect structure of the image-sensor IC is implemented using a wiring topology in which spatial overlap between the wirings of the two electrical circuits is optimized (e.g., minimized) to reduce inter-circuit crosstalk when the two circuits are active at the same time. Such wiring topology may be beneficial, e.g., due to the resulting improvements in the image quality for both operating modes.

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Penfield, NY, United States of America

Pooria Mostafalu