Realtek Semiconductor Inc.

Po-Wei Liu

Chang-Lien Wu

Jui-Chiang Wang

Chen-Kuo Hwang

Jia-Jia Cai

Jui-Chang Tsao

Jian-Yin Zhu

Jen-Hao Yeh

Jia-you Pang

Ting-Kang Chang

An operation method of a network device and a control chip of the network device are provided. The network device receives an input signal through a fiber medium. The operation method includes the following steps: setting a target speed of the network device to a first speed; transmitting and/or receiving a data at the first speed; and setting the target speed of the network device to a second speed which is different from the first speed when the amplitude or energy of the input signal is not greater than a threshold.

Operation method of network device and control chip of network device

An Ethernet connection method and an Ethernet device thereof are provided. The Ethernet connection method and the Ethernet device can transmit data with Error Correction Code (ECC) even with only one twisted pair or two twisted pairs when the Ethernet wire cannot transmit with the full four twisted pairs.

Ethernet connection method and ethernet device thereof

A clock generation system having a time and frequency division activation mechanism is provided that includes a clock source processing circuit that generates a primary clock signal and clock-branching circuits that perform a clock-branching generation procedure respectively in an order. Each of the clock-branching modules includes a frequency division unit and a processing unit. The frequency division unit receives the primary clock signal to divide the frequency according to a divisor number and output a branch clock signal. The processing unit controls the frequency division unit to not output the branch clock signal before the clock-branching generation procedure and to decrease the divisor number gradually over time period after the clock-branching generation procedure begins such that a branch frequency of the branch clock signal generated by the frequency division unit increases from an initial frequency to a final frequency to finish the clock-branching generation procedure.

Clock generation system and method having time and frequency division activation mechanism

A communication apparatus with transmitted rate detecting function and the method therefore is provided. The communication apparatus receives an input signal transmitted at a first rate or a second rate from a remote apparatus. The method includes setting the communication apparatus to operate at an initial receiving rate; sampling the input signal by a specific sampling frequency to generate a sample result; estimating the input transmitted rate of the input signal according to the sample result so as to set the receiving rate of the communication apparatus at a working rate; and communicating with the remote apparatus at the working rate. The second rate is higher than the first rate, and the specific sampling frequency is associated with the initial receiving rate.

Communication apparatus with transmitted rate detecting function and method thereof

A method for testing the integrity of a memory with defective sections under a plurality of operating environments includes testing the memory with defective sections under a plurality of operating environments, recording results of each operating environment test, and comparing the results of the tests. If the results of are the same, the memory with defective sections is declared to have integrity. If not, the memory with defective sections is declared to not have integrity.

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Hsinchu County, Taiwan

Po-Wei Liu