Industrial Technology Research Institute

Po-Sen Huang

Li-Ren Huang

Chun-Yen Wu

Chi-Chun Hsu

Wen-Dar Hsieh

A testing method for a chip with an embedded non-volatile memory and the chip is provided. A remapping circuit and the non-volatile memory are connected to a processor. The non-volatile memory has a test area and an area under test. The test area stores a test program, and the area under test stores data under test. When the processor tests the chip, the processor outputs an original instruction address, and the remapping circuit remaps the original instruction address to generate a remapped instruction address. The processor reads the test program in the test area, and executes the test program to read the data under test in the area under test and to perform a test of toggling the logic circuit.

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Po-Sen Huang