E Ink Holdings Inc.

Po-Hsin Lin

Xue-Hung Tsai

Ted-Hong Shinn

Wei-Tsung Chen

Chi-Liang Wu

Chin-Wen Lin

Henry Wang

Chia-Chun Yeh

Yu-Lin Wang

Chin-Wei Lin

Young-Ran Chuang

A trace structure of a display panel including a first metal layer and a second metal layer is provided. The first metal layer is configured to transmit a first voltage. The second metal layer is disposed under the first metal layer and configured to transmit a second voltage. The first metal layer and the second metal layer form the trace structure on the display panel, such that the trace structure has a capacitor structure. The trace structure is configured to connect a power input and a panel driver circuit.

Trace structure of display panel

A driving substrate includes a substrate, at least one active device, a resistor, a first passivation layer and a second passivation layer. The active device including an oxide semiconductor layer and the resistor coupled to the active device are disposed on the substrate. The first passivation layer covers the active device, wherein a portion of the first passivation layer directly contacts to the oxide semiconductor layer such that the oxide semiconductor layer has a first conductivity. The second passivation layer covers the first passivation layer and the resistor, wherein a portion of the second passivation layer directly contacts to the resistor such that the resistor has a second conductivity. The first conductivity is different from the second conductivity.

Driving substrate and display apparatus

A display device and a display driving circuit with electromagnetic interference suppression capability are provided. The display device includes a substrate, an active matrix, a display driver and a thin-film transistor (TFT) conditioning circuit. The active matrix disposed on the substrate includes multiple data lines, multiple gate lines and multiple pixels. The data lines intersect with the gate lines. The pixels are coupled to intersections of the data lines and the gate lines. The display driver disposed on the substrate generates signals for driving the data lines and/or the gate lines in response to a conditioned serial data clock. The TFT conditioning circuit disposed on the substrate is coupled to the display driver. The TFT conditioning circuit includes one or more TFTs, and attenuates an amplitude of a serial data clock in response to a predetermined gate bias to provide the conditioned serial data clock to the display driver.

Display device and display driving circuit with electromagnetic interference suppression capability

A method of manufacturing a transistor, includes: (i) forming a metal-oxide semiconductor layer over a substrate; (ii) forming a source electrode and a drain electrode on different sides of the metal-oxide semiconductor layer; (iii) forming a dielectric layer over the source electrode, the drain electrode, and the metal-oxide semiconductor layer; (iv) forming a hydrogen-containing insulating layer over the dielectric layer, in which the hydrogen-containing insulating layer has an aperture exposing a surface of the dielectric layer, and the aperture is overlapped with the metal-oxide semiconductor layer when viewed in a direction perpendicular to the surface; (v) increasing a hydrogen concentration of a portion of the metal-oxide semiconductor layer by treating the hydrogen-containing insulating layer so to form a source region and a drain region; and (vi) forming a gate electrode in the aperture.

Transistor and method of manufacturing the same

A pixel structure includes a substrate, a gate electrode disposed on the substrate, a capacitor electrode disposed on the substrate, a first insulation layer, an active layer disposed on the first insulation layer, a drain electrode, a source electrode and an extension electrode. The capacitor electrode is spaced apart from the gate electrode. The first insulation layer covers the gate electrode and the capacitor electrode. The first insulation layer has a recess vertically above the capacitor electrode. The drain and the source electrodes are disposed on the active layer and spaced apart from each other. The extension electrode extends from the drain electrode or the source electrode into the recess.

Pixel structure and display apparatus having the same

A display apparatus includes at least one pixel structure, which includes an active device, an electric insulation layer and a pixel electrode. The electric insulation layer is disposed on the active device. The electric insulation layer has a trench and a via. The via is located on a bottom surface of the trench. A portion of the electric insulation layer surrounding the trench is monolithically connected to another portion of the electric insulation layer surrounding the via. A pixel electrode has a first electrode portion and a second electrode portion connected to each other. The first electrode portion is located in the trench. A thickness of the first electrode portion is less than a depth of the trench. The second electrode portion is located in the via and is electrically connected to the active device through the via.

Display apparatus and pixel structure thereof

A display device includes a substrate and a peripheral circuit structure on the substrate. The peripheral circuit includes a common electrode layer between the ESD protection diode and a pixel unit of the substrate, an ESD protection diode, an isolation layer covering the common electrode layer, a first conductive line on the isolation layer and over the common electrode layer, and a second conductive line on the isolation layer and over the common electrode layer. Two ends of the first conductive line are respectively electrically connected to the ESD protection diode and the pixel unit. Two ends of the second conductive line are electrically connected to the first conductive line on positions that are between the ESD protection diode and the common electrode layer and between the pixel unit and the common electrode layer to respectively form a first junction and a second junction.

Display device and peripheral circuit structure thereof

A display panel having a wireless charging function is provided, and the display panel includes a first substrate, an induction coil layer, a display pixel layer, and a second substrate. The induction coil layer is disposed on the first substrate. The induction coil layer includes at least one induction coil. The induction coil layer is adapted for collaborating with a wireless charging power supply, such that the induction coil layer executes the wireless charging function. The display pixel layer is disposed on the induction coil layer. The second substrate is disposed on the display pixel layer.

Display panel with coil layer for wireless charging

A threshold voltage sensing circuit applied in a display panel includes a first sensor and a second sensor. The first sensor positioned in the display panel receives an operation signal at a regular time point after start-up and continuously receives multiple driving signals which are the same as those received by the pixel circuits of the display panel and outputs a first output voltage accordingly. The second sensor positioned in the display panel receives the driving signals at a regular time point after start-up and outputs a second output voltage accordingly. When the voltage difference between the first output voltage and the second output voltage is beyond a variation standard, the low level of the gate voltage of the pixel circuit is adjusted.

Flat panel display, threshold voltage sensing circuit, and method for sensing threshold voltage

A display panel includes a gate driving circuit and a control circuit. The gate driving circuit includes a plurality of circuit stages. An Nth-circuit stage of the circuit stages includes a start unit, a drive unit, a first pull-down unit, a second pull-down unit, and a current detecting unit. The drive unit is configured to provide a dock signal to an Nth-output terminal. The first pull-down unit is configured to make an enable node have a first pull-down voltage. The second pull-down unit is configured to provide a disable node with a second pull-down voltage. The current detecting unit is configured to detect an error current passing through the first pull-down unit and output an error signal according to the error current. The control circuit is configured to adjust the second pull-down voltage according to the error signal of the Nth-circuit stage.

Display panel

A lamp including a light source, a reflective unit and a light modulation module is provided. The light source provides an illuminating light, and the reflective unit reflects the illuminating light. The light modulation module is disposed between the light source and the reflective unit. In the light modulation module, a region where movable light absorbing materials exist is a light absorbing region, and a region where the movable light absorbing materials are absent is a light penetration region. By applying different electrical fields to the movable light absorbing materials, sizes and locations of the light absorbing region and the light penetration region can be changed. A portion of the illuminating light irradiating the light penetration region penetrates through the light penetration region, is transmitted to the reflective unit, being reflected by the reflective unit, and penetrates through the light penetration region again sequentially.

Lamp

A thin film transistor disposed on a substrate is provided. The TFT includes a gate layer, an insulation layer, a carrier transmission layer, a passivation layer, a first source/drain layer, and a second source/drain layer. The gate layer is disposed on the substrate. The insulation layer is disposed on the gate layer. The carrier transmission layer is disposed on the insulation layer. The carrier transmission layer includes an active layer and a mobility enhancement layer. The passivation layer is disposed on the active layer. The first source/drain layer is disposed on the active layer. The second source/drain layer is disposed on the active layer. The mobility enhancement layer includes a first element. The active layer includes a second element. The electronegativity of the first element is smaller than that of the second element to enhance the carrier mobility of the active layer.

Thin film transistor, array substrate, and display apparatus

A driving substrate is disclosed. The driving substrate includes a first substrate. The first substrate has a display zone and a border zone surrounding the display zone. The border zone includes at least one active area and at least one non-active area. The active area includes a first conductive layer disposed on the first substrate. The non-active area connects the active area to form the border zone. A display using the driving substrate is also disclosed.

Driving substrate and display using the same

A display panel circuit structure includes a substrate, a first metal layer, a second metal layer, and a third metal layer. The first metal layer is disposed on the substrate. The second metal layer is disposed on the first metal layer and electrically connected to the first metal layer, in which the second metal layer has a pad area and a trace area connected to the pad area. The line width of the second metal layer in the pad area is greater than the line width of the second metal layer in the trace area. The third metal layer is disposed on the second metal layer, in which the third metal layer does not overlap the second metal layer n the trace area.

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Hsinchu, Taiwan

Po-Hsin Lin