Mediatek Corporation

Po-Chun Kuo

Ying-Yu Hsu

Chih-Lun Chuang

A transceiver and a clock generation module are provided. The transceiver includes a receiver and the clock generation module. The receiver receives a receiving-input-data and a receiving-input-strobe. The receiver includes a data-receiving circuit for delaying the receiving-input-data and a strobe-receiving circuit for delaying the receiving-input-strobe. The clock generation module includes a calibration circuit, a phase-compensation module, and a multi-phase signal generator. The phase-compensation module compensates one of the data-receiving circuit and the strobe-receiving circuit according to a data-phase-compensation signal and a strobe-phase-compensation signal generated by the calibration circuit. The multi-phase signal generator generates shifted system-clock signals. A phase difference between the first and the second shifted system-clock signals is equivalent to a phase difference between the receiving-path-data and the receiving-path-strobe.

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Hsinchu, Taiwan

Po-Chun Kuo