Western Digital Technologies, Inc.

Sandisk Technologies Inc.

Piyush Dhotre

Niles Yang

Sahil Sharma

Nian Niles Yang

Rohit Sehgal

Phil Reusswig

Nan Lu

Mahim Raj Gupta

Leeladhar Agarwal

Adam Jacobvitz

Brandon Jensen

Daivik Bychapur Manjunatha

A block of memory in a data storage device can experience a read disturb based on how many times the block of memory was read, as well as on the program-erase count of the block. Non-data wordline maintenance triggered by program-erase count can address the read disturb in some situations but not in others, such as when a host is very read intensive and does not write to the memory that often. In one embodiment, maintenance on a non-data wordline in a block of memory is performed in response to the lifetime total amount of data read from the block being above a threshold. In another embodiment, a block is allocated for use based on the lifetime read count of the block and not only on the program-erase count of the block. Other embodiments are disclosed.

Data storage device and method for handling lifetime read disturb

A storage device manages the effects of read operations on the power consumption on the storage device. A controller on the storage device determines the openness of blocks on a memory device. The controller may execute a first protocol and/or a second protocol. In executing the first protocol, the controller may fill open blocks on the memory device such that subsequent read operations are performed on blocks that have been filled. In executing the second protocol, the controller may control which read operations are sent to the memory device based on real-time power consumption on the storage device.

Optimized handling of high current consumption during an open block read

A storage system determines that it is undergoing intensive reads by a host, which can occur, for example, when the storage system is being used to play a video game for a prolonged period of time. As performing a conventional read scrub operation in that situation can result in a decrease in performance, the storage system can instead use a targeted read scrub operation to reduce the impact on host read performance. The targeted read scrub operation can take the form, for example, of a periodic read scan on areas of the memory that are not part of the intensive host read, random read scans on neighboring wordlines where only a single state is read, and/or a passive read scan where acceptable but risky pages are marked for relocation.

Storage system and method for performing a targeted read scrub operation during intensive host reads

A method and apparatus for dynamically determining when, or how often, to do a read scan operation on a solid-state storage drive. One solution adjusts a read scan interval as part of performing a read scan operation. First, a bit error rate is determined for one of a plurality of storage blocks of a non-volatile memory array. Then, a cross temperature metric for the storage block is determined. A read scan interval is changed in response to the cross temperature metric satisfying a cross temperature threshold. Then, data in the storage block is relocated to a free storage block in response to the bit error rate satisfying a relocation threshold.

Variable read scan for solid-state storage device quality of service

A method of operating a storage device, including; performing, by a non-volatile memory, an erase operation on a block of memory in the non-volatile memory, where the non-volatile memory is coupled to a controller; receiving, by the non-volatile memory, a host-transaction within a first time period, where, the non-volatile memory is coupled to a host device; and suspending, by the non-volatile memory, an erase operation in response to receiving the host-transaction by: determining the erase operation has completed a charge phase; and suspending the erase operation during a pulse phase of the erase operation. The method additionally includes the non-volatile memory maintaining a loop counter and a pulse counter, where: the loop counter increments in response to completion of an erase loop, and the pulse counter increments in response to completion of an erase pulse, where the erase pulse is applied during a pulse phase of the erase operation.

Erase suspend scheme in a storage device

A circuit configured to dynamically adjust data transfer speeds for a non-volatile memory die interface. The circuit includes an initialization circuit, a control circuit, a switch circuit, and a read-write circuit. The initialization circuit is configured to load multi-level cell settings that configure a memory interface for transfer of data for storage cells configured to store more than one bit per storage cell. The control circuit is configured to receive a read command that references single-level storage cells of a memory die. The switch circuit is configured to switch settings for the memory interface from the multi-level cell settings to single level cell settings, in response to receiving the read command. The read-write circuit is configured to read data for the read command from the memory die using the single level cell settings.

Growing community of inventors

San Jose, CA, United States of America

Piyush Dhotre