Nxp B.v.

Piotr Gibas

Edwin Jan Schapendonk

Henricus Cornelis Johannes Büthker

Tarik Saric

Neha Goel

Zhirui Zong

Jyotirmoy Ghosh

Namith Vishnu N

One example discloses a power on reset (POR) circuit, wherein a first circuit is configured to un-couple a power supply input from a resistor divider when the voltage on a second end of the capacitor is above a first circuit threshold; a second circuit configured to couple the second end of the capacitor to the power supply input when a voltage on at least one tap point of the resistor divider is above a second circuit threshold; wherein the comparator is coupled to at least one of the tap points, the reference potential, and a POR output; and wherein the comparator is configured to ramp-up a POR signal on the POR output when a voltage on the at least one of the tap points is greater than the comparator threshold.

Power on reset (POR) circuit

Exemplary aspects of the present disclosure involve a system and related method of PLL circuitry in a chirp signaling FMCW system having a variable PLL bandwidth (BW). To adjust the BW, the PLL circuitry may provide for variable capacitance in the circuitry. This capacitance change may allow for a bandwidth for one slope, as used for the acquisition period. The capacitance may then be adjusted to allow for a different bandwidth for another slope which is used to reset the circuitry in preparation for another frequency sweep. Adjusting the PLL BW, via variable capacitance, may be used to mitigate phase noise which can adversely the PLL.

Bandwidth adjustability in an FMCW PLL system

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Eindhoven, Netherlands

Piotr Gibas