Skyworks Solutions, Inc.

Newport Fab, LLC

Oakvale Technology

Pingxi Ma

Marco Racanelli

Daniel Fu

With directly biasing drain to source in a floating-gate N-MOSFET, a new MOSFET-fused nonvolatile ROM cell (MOFROM) is provided by tunneling-induced punch through of the drain junction to the source. The MOFROM is completely compatible with the mainstream standard CMOS process. The standard MOSFET presents an 'OFF' state before the burning and an 'ON' state with a stable low-resistance path after the burning.

MOSFET-fused nonvolatile read-only memory cell (MOFROM)

According to one exemplary embodiment, a VCO core circuit is connected across a first node and a second node. The anode of a first varactor is connected to the first node while the anode of a second varactor is connected to the second node, and the cathode of the first varactor is tied to the cathode of the second varactor. A tuning voltage is also connected to the cathode of the first varactor and the cathode of the second varactor. The inductor is connected across the first node and the second node. A first and second bipolar transistors are configured as a differential pair. A first and second FETs are configured in a common-gate configuration. The drain of the first FET comprises a first output of the BiFET VCO circuit, while the drain of the second FET comprises a second output of the BiFET VCO circuit.

BiFET voltage controlled oscillator

According to one exemplary embodiment, a circuit comprises a bipolar transistor having a base, an emitter, and a collector. For example, the bipolar transistor can be an NPN SiGe HBT. The base of the bipolar transistor is an input of the circuit. The emitter of the bipolar transistor is coupled to a first reference voltage. According to this exemplary embodiment, the circuit further comprises a field effect transistor having a gate, a source, and a drain. For example, the field effect transistor may be an NFET. The collector of the bipolar transistor is coupled to the source of the field effect transistor. The gate of the field effect transistor is coupled to a bias voltage. The drain of the field effect transistor is coupled to a second reference voltage. The drain of the field effect transistor is an output of the circuit.

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Irvine, CA, United States of America

Pingxi Ma