Wis Technologies, Inc.

Micronas Usa, Inc.

Ping Zhu

Li Sha

Shuhua Xiang

Weimin Zeng

Yaojun Luo

Hongjun Yuan

Ouyang He

Wei Ni

A noise filter for a video processing system includes a block selector, a cost calculator, a cost table, a cost comparator, and a coefficient filter. The block selector is coupled to receive data from the quantization unit and selects blocks for additional filtering. The selected blocks are provided to the cost calculator determines a cost for each of the coefficients in the block using the cost table and the costs are summed. The cost comparator compares the total to a threshold, and filters the coefficients using the coefficient filter if the total is greater a preset threshold. The noise filter to the VLC unit then outputs the filter data.

Noise filter for video processing

A method, apparatus, computer medium, and other embodiments for discrete cosine transform and inverse discrete cosine transform (DCT/IDCT) of image signals are described. A DCT/IDCT module includes a plurality of different cores. One embodiment of a core includes two sets of lookup tables to provide multiplication and add operations for the DCT and IDCT functions. Another embodiment of a core include one set of lookup tables, while another embodiment of a core includes no lookup table. The DCT/IDCT module provides forward DCT and IDCT functionality without the use of additional multipliers.

DCT/IDCT with minimum multiplication

A processing system includes an arithmetic logic unit (ALU) sub-system that allows data associated with a prior instruction to be preserved for use with a next instruction or subsequent instruction without having to reload the value using an intermediate register. The ALU sub-system includes a pair of ALUs communicatively cross-coupled with a pair of accumulators. The processing system also includes a data selector coupled to the ALU sub-system for use with memory contention prediction. The data selector includes a constant generator that controls storage of data associated with a previous instruction in a bypass element, and a selector to choose between data from a databus element and data stored in the bypass element.

Processing unit with cross-coupled ALUs/accumulators and input data feedback structure including constant generator and bypass to reduce memory contention

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San Jose, CA, United States of America

Ping Zhu