Ememory Technology Inc.

Ping-Yu Kuo

Chih-Wei Chen

Kuan-Hsun Chen

A non-volatile memory cell includes a first select transistor, a first floating gate transistor, a second select transistor and a second floating gate transistor. The first select transistor is connected with a source line and a first program word line. The first floating gate transistor has a first floating gate. The first floating gate transistor is connected with the first select transistor and a first program bit line. The second select transistor is connected with the source line and a first read word line. The second floating gate transistor has a second floating gate. The second floating gate transistor is connected with the second select transistor and a first read bit line. The first floating gate and the second floating gate are connected with each other.

Non-volatile memory cell and non-volatile cell array

A one time programming non-volatile memory cell includes a first floating gate transistor with a single gate structure, an isolation transistor, and a select transistor. A first terminal of the first floating gate transistor is connected with a second control line. A floating gate of the first floating gate transistor is in a floating state. A first terminal of the isolation transistor is connected with a second terminal of the first floating gate transistor. An isolation gate of the isolation transistor is connected with an isolation line. A first terminal of the select transistor is connected with a second terminal of the isolation transistor. A second terminal of the select transistor is connected with a first control line. A select transistor of the select transistor is connected with a word line.

Growing community of inventors

Hsinchu County, Taiwan

Ping-Yu Kuo