Au Optronics Corporation

Ping-Hung Shih

Peng-Che Tai

Chia-Heng Chen

Wei-Chieh Sun

Meng-Ting Hsieh

Kun-Lung Huang

Jhih-Ci Chen

Ya-Ling Hsu

Chen-Hsien Liao

Yueh-Hung Chung

Min-Tse Lee

Sheng-Yen Cheng

Yi-Fu Chen

A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.

Pixel array substrate

A display panel includes a substrate, a plurality of standard pixel units, and a plurality of dummy pixel units. A plurality of first conductor patterns and a plurality of shield blocks of a shield pattern layer are arranged in an array above the substrate. Each of the standard pixel units includes one of the first conductor patterns and a first shield block of the shield blocks. The first shield blocks and the first conductor patterns are overlapped, respectively. Each of the dummy pixel units includes a second shield block of the shield blocks. The second shield blocks and the first conductor patterns are not overlapped. A first edge of the substrate is spaced apart from a second edge of one of the standard pixel units adjacent to the dummy pixel units by a first distance. The first distance is within a range from 50 &#x3bc;m to 3000 &#x3bc;m.

Driver circuit

Display panel, driver circuit, and manufacturing method of display panel

A device substrate including a substrate and 1st-stage to nth-stage driver units. Each of the 1st-stage to nth-stage driver units includes a pulldown element, a reset element, and an output element. A gate of the pulldown element is used for receiving a corresponding first start signal or a reset signal. A gate of the reset element is used for receiving the reset signal. A drain of the output element is used for outputting a corresponding gate driving signal. A gate of the pulldown element of the nth-stage driver unit is electrically connected with the gate of the reset element of the nth-stage driver unit so as to make the gate of the pulldown element of the nth-stage driver unit be used for receiving the reset signal.

Device substrate

A display panel includes an array substrate, a first pixel unit, a first data line, a common line, a first fanout line, and an opposite substrate. The array substrate includes a substrate including a first display region, a second display region, and a non-display region. The second display region includes a first side and a second side connected to the first side. The non-display region is adjacent connected to the first side. The first display region is adjacent connected to the second side. The first display region has a third side opposite to the second side. The third side is substantially aligned with an edge of the substrate. A first fanout line is disposed on the non-display region and connected to the first data line. The first fanout line has an end substantially aligned with the edge of the substrate.

Display panel and manufacturing method thereof

An electronic device includes a substrate, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer includes at least two first segments and at least one first connection line. The first connection line is connected to the at least two first segments. The second conductive layer includes at least two second segments and at least one second connection line. The at least two second segments do not overlap the at least two first segments in a normal direction of the substrate. The second connection line connects the at least two second segments. The second connection line overlaps the first connection line in the normal direction of the substrate. The third conductive layer includes at least one first connection electrode. The first connection electrode is electrically connected to the at least two first segments and the at least two second segments.

Electronic device comprising first and second conductive layers each having segments corresponding to and separated from each other and a connection line in a peripheral region

An array substrate includes a substrate, first signal lines, sub-pixels, reference potential lines, first bonding pads, second bonding pads, first fan-out lines, second fan-out lines, first connection lines, second connection lines, and a first reference potential line. An accommodation space exists between a first connection line closest to the second bonding pads and a second connection line closest to the first bonding pads. The first reference potential line is disposed in the accommodation space and electrically connected with the reference potential lines.

Array substrate

Electronic device comprising first and second conductive layers each having segments separated from each other and a connection line in a peripheral region

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Hsinchu, Taiwan

Ping-Hung Shih