Taiwan Semiconductor Manufacturing Comp. Ltd.

Ping-Heng Yeh

Ru-Gun Liu

Chih-Ming Lai

Yi-Kan Cheng

Tsong-Hua Ou

Yung-Chin Hou

Hsiao-Shu Chao

Chi-Yeh Yu

Chung-Min Fu

Yao-Ching Ku

Ying-Chou Cheng

Chung-Kai Lin

Min-Hong Wu

A computer implemented method comprises accessing a 3D-IC model stored in a tangible, non-transitory machine readable medium, processing the model in a computer processor to generate a temperature map containing temperatures at a plurality of points of the 3D-IC under the operating condition; identifying an electromigration (EM) rating factor, and calculating and outputting from the processor data representing a temperature-dependent EM current constraint at each point.

System and method of electromigration mitigation in stacked IC designs

Disclosed is a system and method for integrated circuit designs and post layout analysis. The integrated circuit design method includes providing a plurality of IC devices with various design dimensions; collecting electrical performance data of the IC devices; extracting equivalent dimensions of the IC devices; generating a shape related model to relate the equivalent dimensions to the electrical performance data of the IC devices; and creating a data refinement table using the equivalent dimensions and the electrical performance data.

Table-based DFM for accurate post-layout analysis

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Tainan, Taiwan

Ping-Heng Yeh