Taiwan Semiconductor Manufacturing Comp. Ltd.

Pin-Hsuan Yeh

Hsien-Ming Lee

Chien-Hao Chen

Hsiao-Kuan Wei

Hsin-Yun Hsu

Chin-You Hsu

Huan-Just Lin

Sheng-Liang Pan

Chia-Ching Lee

Hung-Chin Chung

Shao-Jyun Wu

Hung-Chi Wu

Chi On Chui

Chung-Chiang Wu

Wei-Chin Lee

Po-Cheng Chen

Kuo-Chan Huang

Generally, the present disclosure provides example embodiments relating to formation of a gate structure of a device, such as in a replacement gate process, and the device formed thereby. In an example method, a gate dielectric layer is formed over an active area on a substrate. A dummy layer that contains a passivating species (such as fluorine) is formed over the gate dielectric layer. A thermal process is performed to drive the passivating species from the dummy layer into the gate dielectric layer. The dummy layer is removed. A metal gate electrode is formed over the gate dielectric layer. The gate dielectric layer includes the passivating species before the metal gate electrode is formed.

Gate structure passivating species drive-in method and structure formed thereby

An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas.

Semiconductor device and method

A method includes forming a gate electrode on a semiconductor region, recessing the gate electrode to generate a recess, performing a first deposition process to form a first metallic layer on the gate electrode and in the recess, wherein the first deposition process is performed using a first precursor, and performing a second deposition process to form a second metallic layer on the first metallic layer using a second precursor different from the first precursor. The first metallic layer and the second metallic layer comprise a same metal. The method further incudes forming a dielectric hard mask over the second metallic layer, and forming a gate contact plug penetrating through the dielectric hard mask. The gate contact plug contacts a top surface of the second metallic layer.

Selective hybrid capping layer for metal gates of transistors

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Taipei, Taiwan

Pin-Hsuan Yeh