Taiwan Semiconductor Manufacturing Comp. Ltd.

Pin-Chuan Su

Teng-Chun Tsai

Kei-Wei Chen

Hsin-Chieh Huang

Shen-Nan Lee

Ming-Yuan Wu

Hui-Chi Huang

Kuo-Yin Lin

Yu-Wen Wang

Che-Lun Chang

Tzu Kai Lin

Jeng-Chi Lin

Chien-Ming Wang

Tai-Chun Huang

Yen-Chun Huang

Joy Cheng

Ting-Ting Chen

Yu-Chung Su

Che-Yuan Hsu

Ling-Fu Nieh

Che-Yuan Hsu, Deseased

A tool and methods of removing films from bevel regions of wafers are disclosed. The bevel film removal tool includes an inner motor nested within an outer motor and a bevel brush secured to the outer motor. The bevel brush is adjustable radially outward to allow the wafer to be inserted in the bevel brush and to be secured to the inner motor. The bevel brush is adjustable radially inward to engage one or more sections of the bevel brush and to bring the bevel brush in contact with a bevel region of the wafer. Once engaged, a solution may be dispensed at the engaged sections of the bevel brush and the inner motor and the outer motor may be rotated such that the bevel brush is rotated against the wafer such that the bevel films of the wafer are both chemically and mechanically removed.

Bevel edge removal methods, tools, and systems

A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

CMP process and methods thereof

A method includes following steps. A semiconductor substrate is etched to form semiconductor fins. A dielectric material is deposited into a trench between the semiconductor fins. The semiconductor fins are etched such that top ends of the semiconductor fins are lower than a top surface of the dielectric material. After etching the semiconductor fins, epitaxially growing epitaxial fins on the semiconductor fins, respectively. A chemical mechanical polish (CMP) process is performed on the epitaxial fins, followed by cleaning the epitaxial fins using a non-contact-type cleaning device. The dielectric material is then such that the top surface of the dielectric material is lower than top ends of the epitaxial fins. A gate structure is formed across the epitaxial fins.

Method for manufacturing a FinFET device

A method for manufacturing a semiconductor device is provided. In the method for manufacturing a semiconductor device, at first, a semiconductor substrate of a wafer is etched to form at least one fin. Then, an insulation structure is formed around the fin. Thereafter, the fin is recessed. Then, an epitaxial channel structure is epitaxially grown over the recessed fin. Thereafter, a portion of the epitaxial channel structure over a top surface of the insulation structure is removed. Then, a non-contact-type cleaning operation is performed to clean a top surface of the wafer after removing said portion of the epitaxial channel structure. Thereafter, the top surface of the wafer is cleaned using hydrogen fluoride after removing said portion of the epitaxial channel structure. Then, the insulation structure is recessed, such that the epitaxial channel structure protrudes from the recessed insulation structure.

FinFET structures and methods of forming the same are disclosed. In a method, a recess is formed exposing a plurality of semiconductor fins on a wafer. A dummy contact material is formed in the recess. The dummy contact material contains carbon. The dummy contact material is cured with one or more baking steps. The one or more baking steps harden the dummy contact material. A first portion of the dummy contact material is replaced with an inter-layer dielectric. A second portion of the dummy contact material is replaced with a plurality of contacts. The plurality of contacts are electrically coupled to source/drain regions of the plurality of semiconductor fins.

FinFET structures and methods of forming the same

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Hsinchu, Taiwan

Pin-Chuan Su