Skhynix Inc.

Samsung Electronics Co., Ltd.

Hynix Semiconductor Inc.

Pil Seon Yoo

Duck Ju Kim

Ji-sang Lee

Je Il Ryu

Gyosoo Choo

A nonvolatile memory device includes a memory cell, a bit line, a page buffer, and a control logic. The page buffer is connected to the memory cell through the bit line and the page buffer is configured to precharge the bit line to perform a desired operation. The desired operation may be one of a read operation and a verify operation. The control logic is configured to control bit line development time differently according to a temperature after precharging the bit line during the desired operation. The control logic is configured to determine the bit line development time according to a period of a reference clock signal that includes a different frequency depending on the temperature and/or a temperature compensation pulse signal including a pulse width that varies based on the temperature.

Nonvolatile memory device and method of operating the same

A multi-regulator circuit comprises a regulator configured to regulate an input voltage to generate a constant voltage, and a plurality of voltage division circuits configured to output divided voltages which are obtained by dividing the constant voltage on the basis of a plurality of voltage generation codes, respectively.

Multi-regulator circuit and integrated circuit including the same

A voltage supply circuit includes a high voltage generator configured to generate an operating voltage, a global word line switch configured to transfer the operating voltage to global word lines, a plurality of local line switches coupled to the global word lines and configured to transfer the operating voltage to corresponding local word lines, a precharge unit configured to supply a precharge voltage to an unselect local line switch adjacent to a select local line switch to which the operating voltage will be supplied, from among the plurality of local line switches, in a preparation section before an operation is started, and a coupling unit configured to couple the unselect local line switch and the global word line switch when the operation is started.

Voltage supply circuit, semiconductor memory device, and operating method thereof

A high voltage generator includes a negative bias generator configured to generate a negative bias, a clock generator configured to generate a clock signal that toggles between a positive bias and the negative bias, a clock doubling circuit configured to raise the positive bias of the clock signal and to output the clock signal having the raised positive bias as a second clock signal, and a charge pump configured to generate a high voltage using the second clock signal having the raised positive bias.

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Seoul, South Korea

Pil Seon Yoo