Nxp Usa, Inc.

Freescale Semiconductor,inc.

Nxp B.v.

Pierre Pascal Savary

Birama Goumballa

Cristian Pavao Moreira

Didier Salle

Dominique Delbecq

Matthis Bouchayer

Stephane Damien Thuriés

Hao Li

Gilles Montoriol

Hugues Beaulaton

Thierry Cassagnes

Jean-Stephane Vigier

Robert Gach

Christophe Landez

Stephane Damien Thuries

Akbar Ghazinour

Gerald Haennig

Stephane Colomines

Arnaud Girardot

Gérald Haennig

There is disclosed an amplifier circuit comprising: an amplifier having input and output terminals; a temperature dependent variable impedance unit comprising: a first terminal, a second terminal and a variable impedance unit control terminal; a transistor comprising a transistor control terminal coupled to the variable impedance unit control terminal; a first resistor coupled in parallel with the conduction channel; a capacitor coupled in series with the conduction channel between the conduction channel and one of: the first terminal; and the second terminal; and wherein: the first terminal is coupled to one of: the input terminal and the output terminal; the second terminal is for coupling to a reference node; and the variable impedance unit control terminal is configured to receive a control signal that is based on a measured temperature indicative of a temperature of the amplifier circuit and thereby provide a temperature dependent variable impedance for the amplifier circuit.

Amplifier circuit with temperature compensation

Amplifier circuit with an output limiter

A transceiver includes a transmitter, a frequency synthesizer coupled to the transmitter, a receiver coupled to the frequency synthesizer and a voltage sensor; and a digital controller coupled to the voltage sensor, the receiver, and the transmitter, wherein based on a DC voltage measurement of an IF signal made by the voltage sensor, a relative phase adjustment occurs of a relative phase associated with a local oscillator (LO) port and a radio frequency (RF) port of the receiver.

Leakage cancellation in a radar receiver

A radar device () is described that includes at least one transceiver () configured to support frequency modulated continuous wave (FMCW); a digital controller (); and a temperature sensor system comprising a plurality of temperature sensors () coupled to various circuits () in the at least one transceiver (). The digital controller () of the radar device () is configured to monitor a temperature of the various circuits () by polling temperature values of the plurality of temperature sensors ().

Temperature sensor system, radar device and method

The disclosure relates to voltage-controlled-oscillator circuit comprising: a charge-pump configured to generate a tuning-voltage, the tuning-voltage having a minimum-operating-voltage; an offset-voltage-source configured to generate an offset-voltage in accordance with the minimum-operating-voltage; and a voltage-controlled-oscillator, VCO, configured to provide an oscillator frequency in accordance with the tuning-voltage and the offset-voltage.

Voltage-controlled-oscillator circuit

An electronic system includes a clock generation circuit to generate a clock signal; and a duty cycle monitoring circuit, DTC, to monitor a duty cycle of the generated clock signal. The DTC includes a differential signal generator circuit to generate an inverted and a non-inverted representation of the generated clock signal. An averaging circuit averages the non-inverted representation and the inverted representation of the generated clock signal. A comparison circuit includes at least a first comparator to compare the averaged non-inverted representation of the generated clock signal with a second respective reference voltage threshold and a second comparator configured to compare the averaged inverted representation with a first respective reference voltage threshold. A reference voltage generation circuit provides the first respective reference voltage threshold associated with the averaged inverted representation of the generated clock signal and provides the second respective reference voltage threshold associated with the non-inverted representation of the generated clock signal. A summing circuit is sums outputs of the first and second comparators and outputs a monitored duty cycle of the generated clock signal.

Duty cycle monitor circuit and method for duty cycle monitoring

A charge pump driver circuit () arranged to output a charge pump control signal (). The charge pump driver circuit () includes a bias current source component () arranged to generate a bias current (), a control stage () and an output stage (). The control stage () is coupled to the bias current source component () and arranged to receive the bias current (). The control stage () is further arranged to receive an input signal () and to generate a control current signal () proportional to the bias current () in accordance with the input signal (). The output stage () is arranged to receive the control current signal () generated by the control stage () and to generate the charge pump control voltage signal () based on the control current signal () generated by the control stage (). The bias current source component () is arranged to vary the bias current () in response to variations in temperature.

Method and apparatus for generating a charge pump control signal

A charge pump driver circuit comprises an output stage and a current generator component. The output stage is arranged to receive at an input node thereof a control current signal and comprises a resistance network coupled between the input node thereof and a reference voltage node and arranged to provide a resistive path through which the control current signal flows. The output stage is arranged to generate at an output node thereof a charge pump control voltage signal based on the voltage level at the input node thereof. The current generator component is arranged to receive an indication of a voltage level of a charge pump output signal, and to generate a feedback current dependent on the voltage level of the output signal, wherein the feedback current is injected into the resistive path of the resistance network through which the control current signal flows.

Charge pump driver circuit

A phase locked loop circuit includes a voltage controlled oscillator, VCO, configured to receive an oscillator tuning voltage; a phase detector configured to receive an input signal and a reference signal and generate a phase difference pulse signal that is varied in accordance with the oscillator tuning voltage; a loop filter having an input and an output; and a level shifter circuit coupled to an output of the phase detector and the loop filter input and configured to apply a level shift to the phase difference pulse signal such that the level shift is configured to compensate VCO gain and the loop filter averages the phase difference pulse signal to output an averaged signal to the VCO.

Phase locked loop circuit, integrated circuit, communication unit and method therefor

An integrated circuit comprises frequency generation circuitry for controlling a frequency source for an automotive radar system. The frequency generation circuitry comprises a Phase Locked Loop (PLL) arranged to generate a control signal for controlling the frequency source, a fractional-N divider located within a feedback loop of the PLL, and frequency pattern control logic operably coupled to the fractional-N divider and arranged to control the fractional-N divider, by way of a frequency control signal, such that the PLL generates a Frequency Modulated Continuous Wave (FMCW) control signal.

Integrated circuit comprising frequency generation circuitry for controlling a frequency source

A wireless communication unit comprises a transmitter having a power amplifier biased by a bias circuit and a controller operably coupled to the bias circuit for setting one or more bias levels of the power amplifier. The bias circuit is a single bias circuit and is configured to provide either a current mode bias control of the power amplifier or a voltage mode bias control of the power amplifier in response to a control signal from the controller. In this manner, a single bias control circuit can be used to support applications that benefit from both current mode bias control and voltage mode bias control of the power amplifier.

Growing community of inventors

Fonsorbes, France

Pierre Pascal Savary