Stmicroelectronics S.a.

Stmicroelectronics S.r.l.

Pierre Marty

Pasquale Butta'

Jean-Michel Moutin

Gaelle Rey

Pascal Chauvet

A circuit for controlling a memory including at least two areas to which access cannot be had simultaneously, the circuit including first circuitry for storing a series of read and/or write instructions separately for each of the areas, and second circuitry for detecting that a first instruction intended for a first area is a predetermined instruction to be followed by a period during which the first area can receive no other instruction, and third circuitry for, during the period, providing instructions to another memory area.

Control circuit to enable high data rate access to a DRAM with a plurality of areas

A circuit including a memory connected to be accessible from a bidirectional bus, an MPEG decoder connected to the bus to be able to read coded and decoded data in the memory, and having a decoded data output connected to the bus according to a first path to be able to read from the memory data of a first image, and a first image display circuit, an input of which is connected to the bus to read from the memory the data written by the decoder, which also includes a decimator circuit, connected between the output of the decoder and the bus according to a second path to be able to write into the memory data of a second image, and a second image display circuit connected to the bus to read from the memory the data written by the decimator circuit.

MPEG decoding circuit displaying images and incrusted images

A circuit includes a microprocessor, an MPEG decoder for decoding an image sequence, and a memory common to the microprocessor and to the decoder. The circuit also includes a circuit for evaluating a decoder delay, a control circuit for, if the decoder delay is greater than a predetermined level, granting the decoder a memory access priority, and otherwise, granting the microprocessor the memory access priority.

MPEG decoder using a shared memory

A method of arbitration among a plurality of n units which seek access to a resource is regulated according to grants identified by means of an arbitration method, which compares between one another the priorities, generating, for each pair of the units comprising in general a unit x and a unit y with respective priorities Px and Py, a selection signal at a high level if the result of the operation Px>&equals;Py is true. The method generates, for the pairs of the units, respective cross-request signals and generates the grant for the ith unit as a logical product of all the cross-request signals req_i_z with z ranging from 1 to n, excluding the case of z&equals;i.

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Seyssins, France

Pierre Marty