United Microelectronics Corp.

Pi-Hsuan Lai

Wei-Hsin Liu

Bin-Siang Tsai

Fu-Yu Tsai

Wei-Lun Hsu

Shang-Yi Yang

A semiconductor device is provided, including: a substrate having a first area and a second area; several first gate structures formed at the first area, and at least one of the first gate structures including a first hardmask on a first gate, and the first gate structure having a first gate length; several second gate structures formed at the second area, and at least one of the second gate structures including a second hardmask on a second gate, and the second gate structure having a second gate length. The first gate length is smaller than the second gate length, and the first hardmask contains at least a portion of nitrogen (N)-based silicon nitride (SiN) which is free of OH concentration.

Method for manufacturing semiconductor device having gate structure with reduced threshold voltage

Semiconductor device having gate structure with reduced threshold voltage and method for manufacturing the same

A method of fabricating a semiconductor device is provided. A plurality of sacrificial gates and a plurality of sacrificial gate dielectric layers thereunder are formed on a substrate. An interlayer dielectric layer is filled between the sacrificial gates. A protective layer is formed on the interlayer dielectric layer. The sacrificial gates and the sacrificial gate dielectric layers are removed to form an opening, wherein the interlayer dielectric layer is protected by the protective layer from recessing. A stacked gate structure is formed in the opening, wherein the protective layer is removed.

Method of fabricating semiconductor device

Growing community of inventors

Kaohsiung, Taiwan

Pi-Hsuan Lai