Xilinx, Inc.

Other

Phillip A Young

Sunhom Paak

Eric E Edwards

Honggo Wijaya

Schuyler E Shimanek

Wayne Edward Wennekamp

Qi Lin

Richard C Li

James A Walstrum, Jr

David Kuan-Yu Liu

Anders T Dejenfelt

Steven T Reilly

Cyrus Chang

A method of operating an input/output interface is described. The method comprises eliminating a current path into an output pin of an input/output interface while the input/output interface receives an operational power signal during a first mode of operation; and enabling the current path into the output pin of the input/output interface to limit a voltage magnitude externally applied to the output pin of the input/output interface during a second mode of operation.

Method and apparatus for a hot-swappable input/output device with programmable over-voltage clamp protection

A method of synchronizing transitions between voltage sources that are used to provide a supply voltage. A first control signal (CS) that indicates whether to initiate a first transition from a first voltage source to a second voltage source to provide the supply voltage (V). When the first control signal indicates to initiate a first transition from a first voltage source to a second voltage source to provide the supply voltage, the first voltage source can be deactivated from providing the supply voltage. In addition, the first voltage source can be pre-biased with a voltage pre-bias to facilitate a second transition from the second voltage source to the first voltage source. Further, the second voltage source can be activated to provide the supply voltage.

Synchronizing transitions between voltage sources used to provide a supply voltage

Pair of mounting brackets

A method and apparatus is provided for a configurable input/output (I/O) interface within an integrated circuit to support a plurality of I/O standards. The configurable I/O interface exhibits a default operation that facilitates hot-swappability, which eliminates current paths within the I/O interface that may be created during plug-and-play operation of the I/O interface. The current paths are eliminated within the I/O interface even while the I/O interface is not receiving operational power, or while the I/O interface is in a power-on reset condition. A programmable option of the configurable I/O interface, on the other hand, alleviates over-voltage conditions while the I/O interface is tri-stated by activating shunt circuitry to conduct a clamp current during the over-voltage condition. The over-voltage condition is further alleviated by passively establishing current paths through existing circuitry within the I/O interface for the duration of the over-voltage condition.

An output circuit allows the slew rate of its output signal to be selectively adjusted. The output driver circuit includes an output driver and pre-driver circuits. The output driver includes an output transistor coupled between a first supply voltage and the output terminal. The pre-driver circuit selectively adjusts a series resistance between the output transistor's gate and a second supply voltage in response to mode control signals.

Slew rate control for output signals

A nonvolatile EEPROM cell having a double poly arrangement provides stored data without sense amplifiers, thereby reducing power requirements. The EEPROM cell has a floating gate in a first poly layer, and a control gate overlapping the floating gate in a second poly layer. This configuration allows for an area-efficient layout that is easily shrinkable as compared to prior art memory cells. In addition, stacking the control and floating gates results in higher capacitive coupling. The EEPROM cell also includes an access gate, a tunnel capacitor, and at least one inverter. In some embodiments, the EEPROM cell can be advantageously used to configure programmable logic without need for a conloading step.

Shrinkable and highly coupled double poly EEPROM with inverter

A configuration circuit includes a latch and a dedicated non-volatile memory cell. The non-volatile memory cell is initially programmed or erased. The latch is then set to store a first logic value by coupling the latch to a first voltage supply terminal in response to an activated control signal. When the control signal is de-activated, the latch is de-coupled from the first voltage supply terminal and coupled to the non-volatile memory cell. If the non-volatile memory cell is programmed, the latch is coupled to a second voltage supply terminal, thereby storing a second logic value in the latch. If the non-volatile memory cell is erased, the latch is isolated from the second voltage supply terminal, and the first logic value remains stored in the latch. The latch can also be directly written through one or more access transistors, thereby facilitating testing.

Non-volatile memory cell integrated with a latch

System and apparatus for data validation is described. An initialization controller includes an initialization state machine. The initialization state machine is configured to cause configuration data to be transferred from memory internal or external to the integrated circuit to other memory internal to the integrated circuit. The configuration data is stored in the integrated circuit, read back from storage in the integrated circuit, and compressed by the integrated circuit after being read back. The configuration data is compressed into a signature, which may be compared with an expected result for the signature.

Data transfer validation system

This invention is an improved tilt lock device for chairs having a spindle and piston for raising and lowering the chair. The improvement consists of a pawl plate for engagement with the piston where the pawl plate is integral with a locking shaft that extends from the chair. The pawl plate contains a barrier rib that is disposed in the upper surface of the plate and is compressively biased by a torsion spring extension. Axial displacement of the locking shaft is precluded when the torsion spring is in bias engagement with the barrier rib. To overcome the bias, the locking shaft requires the application of an axial external force and remains locked until such force overcomes the bias of the barrier rib.

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Albuquerque, NM, United States of America

Phillip A Young