Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Centre National De La Recherche Scientifique

Université Montpellier 2 Sciences Et Techniques

Philippe Maurine

Marc Belleville

Suzanne Lesecq

Edith Beigne

Jacques Fournier

Lionel Vincent

Bettina Rebaud

Maxime Lecomte

A system for securing an electronic circuit including: plural regions, activity of each of which may be controlled; plural sensors integrated into the electronic circuit, each sensor being sensitive to variations in manufacturing process and to provide a measurement representative of a local activity of the electronic circuit; a processing unit including an integrity verification module configured to: determine, based on the measurements provided by the sensors, and for each of the regions, a partition of the sensors between sensors affected and sensors not affected by an activation of the region; compare each of the partitions with a model partition to detect possible presence of a hardware Trojan horse liable to infect the electronic circuit. The system can carry out an authentication of the electronic circuit by its intrinsic physical characteristics by response to a challenge or by generation of a key.

System and method for securing an electronic circuit

A digital electronic circuit includes: a plurality of sequential elements; at least one data-conducting path connecting an input sequential element to a destination sequential element; a clock outputting a clock signal on a clock tree for setting the speed of the sequential elements; a monitoring device receiving, as an input, at least one data signal traveling on a conducting path and arriving at a destination sequential element, the monitoring device including: a module for defining at least one detection window according to the clock tree; and a detector for detecting a transition of each data signal received during a detection window; and wherein each detection window is defined so as to enable the detection or anticipation of a fault corresponding to a violation of the rise time or the maintenance time of a data signal relative to a clock signal edge received by the destination sequential element receiving the data signal.

Device for monitoring the operation of a digital circuit

Growing community of inventors

Quissac, France

Philippe Maurine