Stmicroelectronics S.a.

Stmicroelectronics (grenoble 2) Sas

Stmicroelectronics (alps) Sas

Philippe Level

Serge Ramet

Michel Ayraud

Sébastien Rieubon

Laurent Camino

The present disclosure relates to a circuit including an input terminal configured to receive a first signal at a first frequency; a demodulation chain connected to the input terminal and including a low-noise amplifier having an input coupled to the terminal; a controllable variable impedance connected between a first node and a node configured to receive a reference potential, the first node being connected to the input terminal and/or to the amplifier input; and a current source configured to deliver a current at the first frequency to the first node.

Calibration of an RF attenuator

A local oscillator device includes an oscillator module including a first inductive element and a capacitive element coupled in parallel with the inductive element. A frequency divider is coupled to the oscillator module for delivering a local oscillator signal. The local oscillator device includes an autotransformer including the first inductive element and two second inductive elements respectively coupled to the terminals of the first inductive element and to two output terminals of the autotransformer, the output terminals being further coupled to input terminals of the frequency divider.

Low power local oscillator

An electronic circuit includes at least one differential pair of transistors, a control transistor switch, a first current source and a second current source. The second current source is connected to a common emitter node of the pair of transistors in order to accelerate the discharge of parasitic capacitances during a switching operation.

Electronic circuit with a differential pair of transistors and logic gate comprising such a circuit

A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization interval which is a prime number. The choice of a prime number decreases the power of the limit cycles (lines with a power value higher than the local mean value) which may appear depending on the input code of the modulator and on the initial conditions. Application is proposed to a digital frequency synthesizer.

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Saint Egrève, France

Philippe Level