International Business Machines Corporation

Philippe Lacombe

Renzo Maccagnan

Philippe Coronel

The method of the present invention applies to any semiconductor structure provided with polysilicon filled deep trenches formed in a silicon substrate coated by a Si3N4 pad layer both in the &ldquo;array&rdquo; and &ldquo;kerf&rdquo; areas. First, a photoresist mask is formed onto the structure and patterned to expose the deep trenches only in the &ldquo;array&rdquo; areas. Deep trenches are then anisotropically dry etched to create recesses having a determined depth. Next, the photoresist mask is removed only in the &ldquo;array&rdquo; areas. A step of anisotropic dry etching is now performed to extend said recesses down to the desired depth to create the shallow isolation trenches. The photoresist mask is totally removed. A layer of oxide (STI oxide) is conformally deposited by LPCVD onto the structure to fill said shallow isolation trenches in excess. The structure is planarized to create the STI oxide regions and expose deep trenches in the &ldquo;kerf&rdquo; areas. The polysilicon in these deep trenches is partially or totally removed by etching. Finally, the Si3N4 pad layer is eliminated, creating recesses that will be used as alignment marks for the subsequent photolithography steps. If the polysilicon is not etched, the above method will produce polysilicon bumps instead that can be used for the same purpose.

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Paris, France

Philippe Lacombe