Thomson-csf

Thales

Philippe Elleaume

Yvon Fouche

Serge Drabowitch

Tristan De Couasnon

Gerard Auvray

Guy Desodt

Raoul Monnier

Stephane Hergault

Michel Prevost

Serge Travert

Jean Anastassiades

The invention relates to the general field of complex electronic and/or computerized system architectures for which the interchanges take the form of irregular data flows prompted by processing functions of variable duration in time. The object of the invention is an architecture designed for electronic systems having a plurality of processing nodes in which each node provides a function or part of a function implemented by the system. This architecture is based on one single synchronization link which supplies all the modules with a common synchronization message containing synchronization information and a simplified header. There are a plurality of asynchronous data interchange links. Each link allows a message interchange between two specific processing nodes, with the interchanged messages having data to be processed, accompanied by a generic header. The asynchronous links' generic header includes all the information relating to the system's operating step to which the interchanged data refer. The synchronous link's simplified header makes it possible to determine the data stream to which the associated synchronization information applies. Each processing node has means suitable for interfacing with the synchronous and asynchronous links. The invention applies particularly to the design of electromagnetic or acoustic sensors, such as radars and sonars.

Generic radar architecture

Process for the phase amplitude demodulation of a received radar signal and device implementing such a process

Transmitter, transmission method and receiver

A device and a method for the transmission or storage of data optimizing the use of the pass-band. Also, a method for transmission by phase modulation. In order to obtain high data throughput rates, the synchronization of a transmission clock with the reception clocks is used. This synchronization is gotten, for example, by transmission of a pseudo-random code and by the convolution or correlation of the received signals with the pseudo-random code. The invention also enables the elimination of multiple echoes by computation. The invention can be applied chiefly to the transmission of radio programs, television broadcasts or digital data.

Device and method for the data transmission or storage optimizing the

An integrated circuit for convolution type computations of the form ##EQU1## where j-i+k, and j and k are integers and i is a natural integer, C.sub.i being complex coefficients and X.sub.j being complex or real input data, for use in digital signal processing. A plurality of cells are connected in a sequence, all receiving simultaneously the input data; the complex coefficients are subsequently sent on a propagation bus to a cell first in the sequence of connected cells. Each cell includes a multiplier, and an adder accumulator, and a transfer circuit for transferring received coefficients to the next cell. In each cell, sequentially received coefficients are first used for computation and then transferred by the transfer circuit with a suitable delay. A logic device controls the time distribution and repetition of the real and imaginary parts of the input data. The cells alternately perform partial computations on the real and imaginary parts; the results, with a corresponding validations signal, are pooled by a pooling circuit and applied to a common results-framing and rounding circuit.

Digital computation integrated circuit for convolution type computations

A device for computing a nonrecursive and sliding discrete Fourier transform as applicable in particular to processing of a pulse compression radar signal has N identical and parallel stages (E.sub.k) for receiving in each case samples of the input signal (e.sub.m+N). Each stage comprises two complex rotation operators, two adder-subtracters and two delay circuits and delivers a signal X.sub.k.sup.m+1 obtained from the following equations: ##EQU1##

Device for computing a sliding and nonrecursive discrete Fourier

Filter, phase-measuring device and method for application of said filter

A device for calculating a discrete, moving window and non-recurrent Fourier transform, especially applicable to the processing of a pulse compression radar signal. The device includes N stages which, on the basis of samples of the input signal, each give a signal of the form: ##EQU1## where k is the index of the stage (O&lt;k&lt;N), m the index of the window and N the number of samples in the window, N being a multiple of four. The complex rotations of the expressions (1) and (3) are each broken down into a rotation in the first quadrant of the complex plane, a rotation common to N stages and a supplementary rotation specific to each stage, achieved by addition-subtraction.

Device for calculating a discrete fourier transform and its application

A device for calculating a discrete moving window Fourier transform. It comprises an assembly of circuits receiving samples of the input signal (E.sub.m+n), the output signal of this assembly (.delta..sub.m) being applied to a plurality of N identical and parallel stages (E.sub.k). The assembly of circuits comprises a shift register conferring a delay of N sampling periods on the incident signal and an adder performing the subtraction:

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Antony, France

Philippe Elleaume