Cambridge Gan Devices Limited

Philip Neaves

Florin Udrea

Loizos Efthymiou

A power integrated circuit comprising: a heterojunction structure Gallium Nitride, GaN, chip comprising at least one GaN layer and at least one Aluminium Gallium Nitride, AlGaN, layer wherein the GaN chip comprises at least one main power device comprising a source terminal, a drain terminal, a gate terminal and a two-dimensional electron gas, 2DEG, formed at an interface between the AlGaN and GaN layers and between the source and drain terminals, wherein the gate terminal is configured to modulate at least a portion of the 2DEG when a charge is applied to the gate terminal, a driver comprising at least one low-side component and at least one high-side component, wherein the low-side component comprises a terminal connected to a low DC voltage rail and at least one other terminal connected to the gate terminal of the main power device; wherein the high-side component comprises at least one terminal connected to a high DC voltage rail and at least one other terminal connected to the gate of the main power device; wherein the at least one low-side component of the driver is configured to discharge an input capacitance of the main power device during a turn-off of the main power device and is monolithically integrated within the GaN chip; and wherein the at least one high-side component of the driver is configured to charge up the input capacitance of the main power device and is formed in a semiconductor region comprising a material other than GaN.

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Cambridge, United Kingdom

Philip Neaves