Pmc-sierra, Inc.

Pmc-sierra Us, Inc.

Philip Lyon Northcott

Peter Graumann

Stephen Bates

Jonathan Sadowsky

Peter Dau Geiger

Sean Gregory Gibb

Kenneth William Ferguson

Kenneth David Wagner

Bradley Burke

Michel Duchesneau

Aaron John Dennis

Steven Yu Peng Ng

Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be reliably implemented using various types of memory cells, including relatively inexpensive multi-level cell flash. One embodiment intelligently coordinates remapping of bad blocks with error correction code control, which eliminates the tables used to avoid bad blocks.

Systems and methods for reclaiming memory for solid-state memory

Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application. Predefined gears correspond to different predefined ECC schemes. Based on an observed bit error rate, a gear from a set of predefined gears is selected for use for a particular region of memory. Each gear of the set of predefined gears includes a lower-latency ECC decode option and one or more higher-latency ECC decode options.

Systems and methods for adaptively selecting from among a plurality of error correction coding schemes in a flash drive for robustness and low latency

Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application. Data is stored in page stripes. The page stripes can have varying amounts of payload capacity based on selected error correction code strength. Allocation blocks can be divided into journaling cells, correspond to minimum units of data for which a journaling engine or flash translation layer has a logical-to-physical mapping.

Systems and methods for storing data in page stripes of a flash drive

A method of decoding a primary codeword and a set of secondary codewords stored in a non-volatile memory (NVM), which includes reading, from the NVM, the primary codeword and all the secondary codewords and storing them in a second memory. The primary codeword is then read from the second memory and decoded, utilizing a soft-decision decoder, based on a log-likelihood ratio (LLR) vector. When the decoding of the primary codeword is unsuccessful: each secondary codeword of the set of secondary codewords is read from the second memory and decoded, utilizing a hard-decision decoder, to identify and correct errored data bits in the each secondary codeword and to determine a location of each errored data bit in the primary codeword. An adjusted LLR vector is generated by adjusting the LLR for each primary codeword data bit based on the determined locations of the errored data bits in the primary codeword.

Method and system for decoding encoded data stored in a non-volatile memory

Systems and methods for decoding data for solid-state memory

Systems and methods for storing data for solid-state memory

Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application. A page is associated with a set of primary ECC codewords, and a page stripe is associated with a set of secondary codewords and primary over secondary parity (PoSP) ECC codewords. Two or more page stripes can form a page grid, wherein the page grid is associated with a group of tertiary ECC codewords, wherein the last page stripe of the page grid has a reduced payload capacity.

System and method for tolerating a failed page in a flash device

Systems and methods for adapting to changing characteristics of multi-level cells in solid-state memory

Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application.

Systems and methods for adaptively selecting among different error correction coding schemes in a flash drive

Systems and methods for recovering data from failed portions of a flash drive

Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application. Both primary parity symbols for primary codewords and secondary parity symbols for secondary codewords are generated. The secondary parity symbols are spread out across each page of a group of pages.

Systems and methods for redundantly storing error correction codes in a flash drive with secondary parity information spread out across each page of a group of pages

Systems and methods for mapping for solid-state memory

Systems and methods for initializing regions of a flash drive having diverse error correction coding (ECC) schemes

Systems and methods for transparently varying error correction code strength in a flash drive

Systems and methods for reclaiming flash blocks of a flash drive

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Coquitlam, Canada

Philip Lyon Northcott