Freescale Semiconductor,inc.

Philip Li

Olin L Hartin

Matthias Passlack

Bruce McRae Green

Charles E Weitzel

Jay Paul John

Thuy B Dao

Monte Gene Miller

Suman K Banerjee

Ellen Y Lan

Marcus R Ray

Methods are provided for forming a semiconductor device from a substrate comprising a bottom gate layer, a channel layer overlying the bottom gate layer, and a top gate structure formed over the channel layer. First, a hardmask comprising a first material interposed between a second material and a third material is deposited over a portion of the top gate structure. Then, the hardmask and top gate structure are encapsulated with an insulating material to form a spacer. A channel structure is formed from the channel layer, and the channel structure is disposed under the spacer. A bottom gate structure is formed from the bottom gate layer, and the bottom gate structure is disposed under the channel structure. Then, a source/drain contact is formed around the bottom gate structure.

Method of making planar double gate silicon-on-insulator structures

In one embodiment, a semiconductor device () includes a buffer layer () formed over a substrate (). An AlGaAs layer () is formed over the buffer layer () and has a first doped region () formed therein. An InGaAs channel layer () is formed over the AlGaAs layer (). An AlGaAs layer () is formed over the InGaAs channel layer (), and the AlGaAs layer () has a second doped region formed therein. A GaAs layer () having a first recess is formed over the AlGaAs layer (). A control electrode () is formed over the AlGaAs layer (). A doped GaAs layer () is formed over the undoped GaAs layer () and on opposite sides of the control electrode () and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device () maintains linear operation over a wide temperature range.

pHEMT with barrier optimized for low temperature operation

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Scottsdale, AZ, United States of America

Philip Li