Juniper Networks, Inc.

Synoptics Communications, Inc.

Philip Kruzinski

Meenakshi S Subramanian

DeviPrasad Natesan

Charles Frederick Barry

Feng Frank Pan

David R Jorgensen

Tian (Alan) Shen

Guochun (George) Zhao

Tian Shen

Guochun George Zhao

Gaurav Garg

Keith Eric Holleman

Som Sikdar

Ayal Opher

Murthy Garikiparthi

Guochun Zhao

An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values

In one example, network device includes a control unit having one or more hardware-based microprocessors and an interface. The interface can receive a first time synchronization message from a master device that comprises a first TTL value. The first TTL value can be indicative of a number of hops traversed by the first time synchronization message. The interface can subsequently receive a second time synchronization message from the master device that comprises a second TTL value that is is indicative of a number of hops traversed by the second time synchronization message. The network device can also include a timing module that determines a time adjustment based at least in part on the determination that the first and second TTL values are different, and applies the time adjustment to update the time of the network device.

Time adjustment using time-to-live values

An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

A data communications network providing for a multiport router and providing for use of an asynchronous transfer mode (ATM) switch or the like as a routing backplane or packet switching engine. A router front end formats ATM cells including providing routing information in the cell header. The routing information may comprise, for example, a destination port identifier in the VPI field of the cell header. The ATM switch then switches the cell from an input port, coupled with the router front end to an output port based on the routing information. The ATM switch may also translate the routing information to provide source identification information to the destination. In a described embodiment, the multiport router is used as a backplane bus in a network concentrator.

Routing device utilizing an ATM switch as a multi-channel backplane in a

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Redwood City, CA, United States of America

Philip Kruzinski