Silicon Genesis Corporation

Philip James Ong

Francois J Henley

Igor J Malik

Harry Robert Kirk

Sien G Kang

James Andrew Sullivan

Michael I Current

Ariel Flat

David Jacy

Martin Fuerfanger

The present invention provides for treating a surface of a semiconductor material. The method comprises exposing the surface of the semiconductor material to a halogen etchant in a hydrogen environment at an elevated temperature. The method controls the surface roughness of the semiconductor material. The method also has the unexpected benefit of reducing dislocations in the semiconductor material.

Non-contact etch annealing of strained layers

A photovoltaic cell device, e.g., solar cell, solar panel, and method of manufacture. The device has an optically transparent substrate comprises a first surface and a second surface. A first thickness of material (e.g., semiconductor material, single crystal material) having a first surface region and a second surface region is included. In a preferred embodiment, the surface region is overlying the first surface of the optically transparent substrate. The device has an optical coupling material provided between the first surface region of the thickness of material and the first surface of the optically transparent material. A second thickness of semiconductor material is overlying the second surface region to form a resulting thickness of semiconductor material.

Method and structure for fabricating solar cells

Method and structure for fabricating solar cells using a layer transfer process

A method for fabricating a silicon on substrate structure having smooth edge regions. The method includes providing a silicon donor substrate having a surface region and a backside region. A substrate thickness is provided between the surface region and the backside region. The method includes co-implanting a plurality of first particles through the surface region into a vicinity of a cleave region and a plurality of second particles through the surface region into the vicinity of the cleave region. The cleave region defines a thickness of material to be removed between the cleave region and the surface region. The surface region of the silicon donor substrate is joint to a handle substrate to form a coupled substrate structure. The coupled substrate structure is then processed using a thermal treatment process and placed into a cleaving chamber. A cleaving action is initiated at an edge region of the coupled substrate structure to begin to detach the thickness of material at the edge region toward a center region of the thickness of material. The thickness of material is freed from a remaining portion of the coupled substrate structure. In a specific embodiment, the method provides an edge region having an edge profile that is substantially free from particles that can lead to breakage and the like.

Method and edge region structure using co-implanted particles for layer transfer processes

A method for fabricating bonded substrate structures, e.g., silicon on silicon. In a specific embodiment, the method includes providing a thickness of single crystal silicon material transferred from a first silicon substrate coupled to a second silicon substrate. In a specific embodiment, the second silicon substrate has a second surface region that is joined to a first surface region from the thickness of single crystal silicon material to form of an interface region having a first characteristic including a silicon oxide material between the thickness of single crystal silicon material and the second silicon substrate. The method includes subjecting the interface region to a thermal process to cause a change to the interface region from the first characteristic to a second characteristic. In a specific embodiment, the second characteristic is free from the silicon oxide material and is an epitaxially formed silicon material provided between the thickness of single crystal silicon material and the second silicon substrate. The method includes maintaining the interface region free of multiple voids during the thermal process to form the epitaxially formed silicon material to electrically couple the thickness of single crystal silicon material to the second silicon substrate.

Method and structure for fabricating bonded substrate structures using thermal processing to remove oxygen species

A method for forming a strained layer of semiconductor material, e.g., silicon, germanium, Group III/V, silicon germanium alloy. The method includes providing a non-deformable surface region having a first predetermined radius of curvature, which is defined by R() and is defined normal to the surface region. The method includes providing a first substrate (e.g., silicon wafer) having a first thickness. Preferably, the first substrate has a face, a backside, and a cleave plane defined within the first thickness. The method includes a step of overlying the backside of the first substrate on a portion of the surface region having the predetermined radius of curvature to cause a first bend within the thickness of material to form a first strain within a portion of the first thickness. The method provides a second substrate having a second thickness, which has a face and a backside. The method includes a step of overlying the face of the second substrate on a portion of the face of the first substrate to cause a second bend within the thickness of material to form a second strain within a portion of the second thickness. A step of joining the face of the second substrate to the face of the first substrate form a sandwich structure while maintaining the first bend in the first substrate and the second bend in the second substrate. Preferably, joining occurs using a low temperature process such as plasma activated bonding or the like.

Method and system for fabricating strained layers for the manufacture of integrated circuits

Embodiments in accordance with the present invention relate to methods and apparatuses for bonding together substrates in a manner that suppresses the formation of voids between them. In a specific embodiment, a backside of each substrate is adhered to a front area of flexible, porous chuck having a rear area in pneumatic communication with a vacuum. Application of the vacuum causes the chuck and the associated substrate to slightly bend. Owing to this bending, physical contact between local portions on the front side of the flexed substrates may be initiated, while maintaining other portions on front side of the substrates substantially free from contact with each other. A bond wave is formed and maintained at a determined velocity to form a continuous interface joining the front sides of the substrates, without formation of voids therebetween. In one embodiment, the chucks may comprise porous polyethylene sealed with polyimide except for a portion of the front configured to be in contact with the substrate, and a portion of the backside configured to be in communication with a vacuum source.

Method and apparatus for flag-less water bonding tool

A system for manufacturing multilayered substrates. The system has a support member is adapted to process a film of material comprising a first side and a second side from a first state to a second state. The support member is attached to the first side of the film of material. The second state comprises a stressed state. The system has a handle substrate comprising a face, which is adapted to be attached to the second side of the film of material. The support member is capable of being detached from the first side of the film of material thereby leaving the handle substrate comprising the film of material in the second state being attached to the face of the handle substrate.

Method and system for lattice space engineering

A method for forming a strained layer of semiconductor material, e.g., silicon, germanium, Group III/V, silicon germanium alloy. The method includes providing a non-deformable surface region having a first predetermined radius of curvature, which is defined by R(1) and is defined normal to the surface region. The method includes providing a first substrate (e.g., silicon wafer) having a first thickness. Preferably, the first substrate has a face, a backside, and a cleave plane defined within the first thickness. The method includes a step of overlying the backside of the first substrate on a portion of the surface region having the predetermined radius of curvature to cause a first bend within the thickness of material to form a first strain within a portion of the first thickness. The method provides a second substrate having a second thickness, which has a face and a backside. The method includes a step of overlying the face of the second substrate on a portion of the face of the first substrate to cause a second bend within the thickness of material to form a second strain within a portion of the second thickness. A step of joining the face of the second substrate to the face of the first substrate form a sandwich structure while maintaining the first bend in the first substrate and the second bend in the second substrate. Preferably, joining occurs using a low temperature process such as plasma activated bonding or the like.

System for forming a strained layer of semiconductor material

The present invention provides a method of forming a strained semiconductor layer. The method comprises growing a strained first semiconductor layer, having a graded dopant profile, on a wafer, having a first lattice constant. The dopant imparts a second lattice constant to the first semiconductor layer. The method further comprises growing a strained boxed second semiconductor layer having the second lattice constant on the first semiconductor layer and growing a sacrificial third semiconductor layer having the first lattice constant on the second semiconductor layer. The method further comprises etch annealing the third and second semiconductor layer, wherein the third semiconductor layer is removed and the second semiconductor layer is relaxed. The method may further comprises growing a fourth semiconductor layer having the second lattice constant on the second semiconductor layer, wherein the fourth semiconductor layer is relaxed, and growing a strained fifth semiconductor layer having the first semiconductor lattice constant on the fourth semiconductor layer. The method controls the surface roughness of the semiconductor layers. The method also has the unexpected benefit of reducing dislocations in the semiconductor layers.

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Milpitas, CA, United States of America

Philip James Ong