Silicon Laboratories Inc.

Cirrus Logic Inc.

Philip David Steiner

Michael Henderson Perrott

Vadim Gutnik

Aryesh Amar

Gerard Pepenella

A loss-of-signal (LOS) condition is detected by sampling input data for a predetermined time period, comparing a magnitude of the sampled input data to a threshold signal strength level, and asserting a LOS indication if the number of samples that have signal strength less than the threshold signal strength level is less than a predetermined value.

Method and apparatus for determining a loss of signal condition

An integrated circuit has a loss of signal (LOS) system for detecting a loss of signal condition for an input data stream according to a LOS threshold. The LOS threshold specifies a minimum signal magnitude indicating the loss of signal condition. The integrated circuit includes a sampling circuit to sample a LOS signal, which receives a sampling threshold specifying a signal magnitude for a sampled signal above which the sampling circuit samples the sampled signal as a first digital value and below which the sampling circuit samples the sampled signal as a second digital value. A digital control circuit coupled to an output of the sampling circuit generates a calibrated digital representation of the sampling threshold according to a plurality of samples of the LOS signal. The calibrated sampling threshold is then used during loss of signal evaluation.

Calibration of a loss of signal detection system

A method and system for powering down an analog-to-digital converter (&ldquo;ADC&rdquo;) into a sleep mode are disclosed. If the ADC receives a normal set of pulses for a serial clock signal of the ADC, a serial interface controller outputs converted data requested by a user through a serial interface. Also, if the ADC receives a sleep set of pulses for the serial clock signal, a state machine of the ADC powers down the ADC into a sleep mode in which at least parts of the ADC are operated at a reduced power consumption level. Furthermore, if the ADC is in the sleep mode and the ADC receives a wake-up set of pulses for the serial clock signal, the state machine powers back up the ADC from the sleep mode.

Method and system for powering down an analog-to-digital converter into a sleep mode

A loss of signal condition is evaluated for an input data stream according to a signal strength threshold level. The signal strength threshold level is determined according to a supplied loss of signal (LOS) threshold level. Two hysteresis modes are used to ensure the hysteresis at low LOS threshold levels is sufficient. The first mode uses hysteresis for the signal strength threshold level that is proportional to the LOS threshold level when the LOS threshold level is above a predetermined level. The second mode employs fixed hysteresis for the signal strength threshold level when the LOS threshold level is below the predetermined level. The hysteresis provides a signal strength threshold level that has a greater magnitude on deassertion of a loss of signal indication than on assertion of the loss of signal indication.

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Nashua, NH, United States of America

Philip David Steiner