Raytheon Company

Philbert Francis Marsh

Colin Steven Whelan

William E Hoke

A method for passivating a photodiode so as to reduce dark current, I, due to the exposed semiconductor material on the sidewall of the device. The method includes etching away sidewall surface damage using a succinic acid-hydrogen peroxide based sidewall etch. This is followed by a subsequent hydrochloric acid (HCl)-based surface treatment which completes the surface treatment and reduces the dark current I. Finally, a polymer coating of benzocyclobutene (BCB) is applied after the surface treatment to stabilize the surface and prevent oxidation and contamination which would otherwise raise the dark current were the diodes left with no coating. The BCB is then etched away from the contact pad areas to allow wirebonding and other forms of electrical contact to the diodes. Such method effectively stabilizes the etched surfaces of photodiodes resulting in significantly reduced and stable dark current.

Photodiode passivation technique

A method for passivating a III-V material Schottky layer of a field effect transistor. The transistor has a gate electrode in Schottky contact with a gate electrode contact region of the Schottky layer. The gate electrode is adapted to control a flow of carriers between a source electrode of the transistor and a drain electrode of such tarnsistor. The transistor has exposed surface portions of the Schottky layer beween the source electrode and the drain electrode adjacent to the gate electrode contact region of the Schottky layer. The method includes removing organic contamination from the exposed surface portions of the Schottky layer using a oxygen plasma. The contamination removed surface portions of the Schottky layer are exposed to a solution of ammonium sulfide and NHOH. After removal of the solution, the exposed regions are dried in a nitrogen enviroment. A layer of passivating material is deposited over the dried surface portions.

Sulfide encapsulation passivation technique

A transistor structure having an gallium arsenide (GaAs) semiconductor substrate; a lattice match layer; an indium aluminum arsenide (InAlAs) barrier layer disposed over the lattice match layer; an In Ga As lower channel layer disposed on the barrier layer, where y is the mole fraction of In content in the lower channel layer; an In Ga As upper channel layer disposed on the lower channel layer, where x is the mole fraction of In content in the upper channel layer and where x is different from y; and an InAlAs Schottky layer on the In Ga As upper channel layer. The lower channel layer has a bandgap greater that the bandgap of the upper channel layer. The lower channel layer has a bulk electron mobility lower than the bulk electron mobility of the upper channel layer where.

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Andover, MA, United States of America

Philbert Francis Marsh