Infineon Technologies Ag

Petra Felsner

Hans-Joachim Barth

Erdem Kaltalioglu

Gerald R Friese

Thomas Schafbauer

Uwe Kerst

An embodiment of a MIM capacitor includes a first insulating layer formed over a wafer and a first capacitor plate formed over the wafer within the first insulating layer. The MIM capacitor further includes a second insulating layer formed over the first insulating layer, a capacitor dielectric formed over the first capacitor plate within the second insulating layer and a second capacitor plate formed over the capacitor dielectric within the second insulating layer. A recess is formed in the second capacitor plate below an upper surface of the second insulating layer and a catalytic activation layer is formed in the recess.

MIM capacitors with catalytic activation layer

In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.

Capacitor and method of manufacturing a capacitor

A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a wafer including a MIM capacitor bottom plate, and depositing an insulating layer over the MIM capacitor bottom plate. The insulating layer is patterned with a MIM capacitor top plate pattern, and a MIM dielectric material is deposited over the patterned insulating layer. A conductive material is deposited over the MIM dielectric material, and the wafer is planarized to remove the conductive material and MIM dielectric material from the top surface of the insulating layer and form a MIM capacitor top plate. A second cap layer is selectively formed over the MIM capacitor top plate.

MIM capacitor with a cap layer over the conductive plates

Semiconductor devices having capacitors formed of a high-k dielectric and a pair of interconnections on either side of the dielectric are provided along with methods of fabricating such semiconductor devices. The interconnections comprise a via and a metal layer.

Methods of forming MIM capacitors

FBEOL process for Cu metallizations free from Al-wirebond pads

A method of making a metal-insulator-metal (MIM) capacitor ( ) having self-passivating plates ( ). A liner ( ) is deposited on a workpiece ( ) and dielectric ( ). A conductive layer ( ) is deposited and annealed to form dopant-rich region ( ). Insulating region ( ) is formed on exposed portions of dopant-rich region ( ) by exposure to atmosphere or oxygen. Capacitor dielectric layer ( ) is disposed over the first capacitive plate ( ). A second capacitive plate ( ) is formed over the first capacitive plate ( ) and capacitor dielectric layer ( ). The second capacitive plate ( ) is annealed to form dopant-rich region ( ) and exposed to atmosphere or oxygen to form insulating region ( ). Optional seed layer ( ) may be deposited prior to the formation of the first capacitive plate ( ).

Growing community of inventors

Munich, Germany

Petra Felsner