Infineon Technologies Ag

Peter Zorn

Carsten Von Koblinski

Andre Brockmeier

Francisco Javier Santos Rodriguez

Alexander Breymesser

Ulrike Fastner

Bernhard Goller

Ravi Keshav Joshi

Kamil Karlovsky

Rainer Leuschner

Thomas Christian Neidhart

Vijaye Rajaraman

Karl Mayer

Markus Ottowitz

Petra Fischer

Kai-Alexander Schreiber

Francesco Solazzi

Johanna Schlaminger

Monika Cornelia Voerckel

Christine Moser

Christian Griessler

Katharina Maier

A battery includes a first substrate having a first main surface, a second substrate made of a conducting material or semiconductor material, and a carrier of an insulating material. The carrier has a first and a second main surfaces, the second substrate being attached to the first main surface of the carrier. An opening is formed in the second main surface of the carrier to uncover a portion of a second main surface of the second substrate. The second main surface of the carrier is attached to the first substrate, thereby forming a cavity. The battery further includes an electrolyte disposed in the cavity.

Battery, integrated circuit and method of manufacturing a battery

A semiconductor device includes an insulating carrier structure comprised of an insulating inorganic material. The carrier structure has a receptacle in which a semiconductor chip is disposed. The semiconductor chip has a first side, a second side and a lateral rim. The carrier structure laterally surrounds the semiconductor chip and the lateral rim. The semiconductor device also includes a metal structure on and in contact with the second side of the semiconductor chip and embedded in the carrier structure.

Semiconductor device with plated lead frame

According to various embodiments, a method for processing an electronic device may include: forming a patterned hard mask layer over a power metallization layer, the patterned hard mask layer exposing at least one surface region of the power metallization layer; and patterning the power metallization layer by wet etching of the exposed at least one surface region of the power metallization layer.

Method for patterning a power metallization layer, electronic device and method for processing an electronic device

A method of manufacturing a plurality of glass members comprises bringing a first main surface of a glass substrate in contact with a first working surface of a first mold substrate, the first working surface being provided with a plurality of first protruding portions, and bringing a second main surface of the glass substrate in contact with a second working surface of a second mold substrate, the second working surface being provided with a plurality of second protruding portions. The method further comprises controlling a temperature of the glass substrate to a temperature above a glass-transition temperature to form the plurality of glass members, removing the first and the second mold substrates from the glass substrate, and separating adjacent ones of the plurality of glass members.

Method of manufacturing a plurality of glass members, a method of manufacturing an optical member, and array of glass members in a glass substrate

A lithium ion battery includes a first substrate having a first main surface, and a lid including an insulating material. The lid is attached to the first main surface of the first substrate, and a cavity is defined between the first substrate and the lid. The lithium ion battery further includes an electrical interconnection element in the lid, the electrical interconnection element providing an electrical connection between a first main surface and a second main surface of the lid. The lithium ion battery further includes an electrolyte in the cavity, an anode at the first substrate, the anode including a component made of a semiconductor material, and a cathode at the lid.

Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery

A carrier substrate having a plurality of receptacles each for receiving and carrying a semiconductor chip is provided. Semiconductor chips are arranged in the receptacles, and metal is plated in the receptacles to form a metal structure on and in contact with the semiconductor chips. The carrier substrate is cut to form separate semiconductor devices.

Semiconductor device with plated lead frame, and method for manufacturing thereof

Methods, apparatuses and devices are described where a main wafer is irreversibly bonded to a carrier wafer and thinned to reduce a thickness of the main wafer, for example down to a thickness of 300 &#x3bc;m or below.

Devices with thinned wafer

A method for manufacturing semiconductor devices includes providing a stack having a semiconductor wafer and a glass substrate with openings and at least one trench attached to the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor devices. The openings of the glass substrate leave respective areas of the semiconductor devices uncovered by the glass substrate and the trench connects the openings. A metal layer is formed at least on exposed walls of the trench and the openings and on the uncovered areas of the semiconductor devices of the semiconductor wafer. A metal region is formed by electroplating metal in the openings and the trench and by subsequently grinding the glass substrate to remove the trenches. The stack of the semiconductor wafer and the attached glass substrate is cut to separate the semiconductor devices.

Growing community of inventors

Villach, Austria

Peter Zorn