Broadcom Corporation

Stmicroelectronics Gmbh

Peter William Hughes

Simon Christopher Dequin Clemow

Neal Fitzhenry

Paul Andrew Freeman

A method for designing multi-layer electronic circuits includes defining a plurality of circuit blocks in terms of physical boundaries, the plurality of circuit blocks including a first circuit block with at least one port for connecting to a portion of inter-block routing having conducting material external to the first circuit block. The method further provides protective routing for the at least one port of the first circuit block in a region between the block and the inter-block routing, wherein circuitry within the first circuit connected to the at least one port is not in-circuit with the conducting material of the inter-block routing during processing steps involving the conducting material. The protective routing is a conducting layer which is higher in the multi-layer structure than the highest conducting layer used for routing the net containing the at least one port for inter-block routing. The protective routing also bridges the at least one port to inter-block routing connected to the net in a halo region. Software and/or a computer program product that can be used for multi-layer circuit design is also described.

Method and apparatus for circuit design

An input stage of an integrated circuit comprising a first and a second voltage divider, and a comparator, each voltage divider comprising a respective first MOS transistor in series with a diode-connected second MOS transistor connected between a first and a second supply rail, outputs of each divider being input to a comparator, the gate of the first MOS transistor of the first divider providing the circuit input and the gate of the first MOS transistor of the second divider being responsive to a reference voltage, where the aspect ratios of the first and second MOS transistors of the first divider are selected to overcome oxide stress when the circuit input voltage lies outside the voltages on the first and second supply rails.

On-chip higher-to-lower voltage input stage

An output current unit comprises a cascode circuit having a first transistor connected between a voltage supply line and complementary outputs. Second and third transistors are controlled by inverter circuitry having parallel conducting paths between an output node and a ground line, the parallel conducting paths having different current carrying capacity with control circuitry to switch the stronger of the current carrying paths.

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Bristol, United Kingdom

Peter William Hughes